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authorEric Christopher <echristo@apple.com>2011-07-28 00:08:06 +0000
committerEric Christopher <echristo@apple.com>2011-07-28 00:08:06 +0000
commit8afab4d19ed97c2fb200474763361bc1fde47710 (patch)
treee20dd0b9599de821ebda2461544b4f7f737d998f
parentf65a0e50ff8090ea7f54228939c35b7c55597d15 (diff)
downloadbcm5719-llvm-8afab4d19ed97c2fb200474763361bc1fde47710.tar.gz
bcm5719-llvm-8afab4d19ed97c2fb200474763361bc1fde47710.zip
This was meant to test arm anyhow, make the registers agree with the
instruction and the architecture for which the instruction exists. llvm-svn: 136301
-rw-r--r--clang/test/CodeGen/2010-05-26-AsmSideEffect.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/clang/test/CodeGen/2010-05-26-AsmSideEffect.c b/clang/test/CodeGen/2010-05-26-AsmSideEffect.c
index e99ec618800..c9231e25330 100644
--- a/clang/test/CodeGen/2010-05-26-AsmSideEffect.c
+++ b/clang/test/CodeGen/2010-05-26-AsmSideEffect.c
@@ -1,9 +1,9 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -emit-llvm -triple arm-apple-darwin -o - | FileCheck %s
// Radar 8026855
int test (void *src) {
register int w0 asm ("0");
- // CHECK: call i32 asm "ldr $0, [$1]", "={ax},r,~{dirflag},~{fpsr},~{flags}"(i8*
+ // CHECK: call i32 asm "ldr $0, [$1]", "={r0},r,~{dirflag},~{fpsr},~{flags}"(i8*
asm ("ldr %0, [%1]": "=r" (w0): "r" (src));
return w0;
}
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