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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-13 19:04:56 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-13 19:04:56 +0000 |
| commit | 8a9e404c0ef45034b6ff6878b3fce43bdada7d8e (patch) | |
| tree | 0646f7f6e9be88b09957696cc7abc7169f508248 | |
| parent | 9dd5ca1fe87a9e915b86f3d331d20ff6197b321d (diff) | |
| download | bcm5719-llvm-8a9e404c0ef45034b6ff6878b3fce43bdada7d8e.tar.gz bcm5719-llvm-8a9e404c0ef45034b6ff6878b3fce43bdada7d8e.zip | |
R600/SI: Minor test scheduling fixes
This prevents these from failing in a later commit.
llvm-svn: 229134
| -rw-r--r-- | llvm/test/CodeGen/R600/fceil64.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/ffloor.f64.ll | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.round.f64.ll | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/sign_extend.ll | 5 |
4 files changed, 17 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/R600/fceil64.ll b/llvm/test/CodeGen/R600/fceil64.ll index 84898d09dae..e3244fa2903 100644 --- a/llvm/test/CodeGen/R600/fceil64.ll +++ b/llvm/test/CodeGen/R600/fceil64.ll @@ -23,8 +23,8 @@ declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone ; SI: cmp_gt_i32 ; SI: cndmask_b32 ; SI: cndmask_b32 -; SI: v_cmp_gt_f64 -; SI: v_cmp_lg_f64 +; SI-DAG: v_cmp_gt_f64 +; SI-DAG: v_cmp_lg_f64 ; SI: s_and_b64 ; SI: v_cndmask_b32 ; SI: v_cndmask_b32 diff --git a/llvm/test/CodeGen/R600/ffloor.f64.ll b/llvm/test/CodeGen/R600/ffloor.f64.ll index a74b95c5b35..745ad3b4739 100644 --- a/llvm/test/CodeGen/R600/ffloor.f64.ll +++ b/llvm/test/CodeGen/R600/ffloor.f64.ll @@ -24,11 +24,11 @@ declare <16 x double> @llvm.floor.v16f64(<16 x double>) nounwind readnone ; SI: cmp_gt_i32 ; SI: cndmask_b32 ; SI: cndmask_b32 -; SI: v_cmp_lt_f64 -; SI: v_cmp_lg_f64 -; SI: s_and_b64 -; SI: v_cndmask_b32 -; SI: v_cndmask_b32 +; SI-DAG: v_cmp_lt_f64 +; SI-DAG: v_cmp_lg_f64 +; SI-DAG: s_and_b64 +; SI-DAG: v_cndmask_b32 +; SI-DAG: v_cndmask_b32 ; SI: v_add_f64 ; SI: s_endpgm define void @ffloor_f64(double addrspace(1)* %out, double %x) { diff --git a/llvm/test/CodeGen/R600/llvm.round.f64.ll b/llvm/test/CodeGen/R600/llvm.round.f64.ll index f21c2ae4c3f..920dbb33163 100644 --- a/llvm/test/CodeGen/R600/llvm.round.f64.ll +++ b/llvm/test/CodeGen/R600/llvm.round.f64.ll @@ -15,16 +15,16 @@ define void @round_f64(double addrspace(1)* %out, double %x) #0 { ; SI: buffer_load_dwordx2 ; SI: v_bfe_u32 [[EXP:v[0-9]+]], v{{[0-9]+}}, 20, 11 -; SI: v_not_b32_e32 -; SI: v_not_b32_e32 +; SI-DAG: v_not_b32_e32 +; SI-DAG: v_not_b32_e32 -; SI: v_cmp_eq_i32 +; SI-DAG: v_cmp_eq_i32 -; SI: s_mov_b32 [[BFIMASK:s[0-9]+]], 0x7fffffff -; SI: v_cmp_lt_i32_e64 -; SI: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[BFIMASK]] +; SI-DAG: s_mov_b32 [[BFIMASK:s[0-9]+]], 0x7fffffff +; SI-DAG: v_cmp_lt_i32_e64 +; SI-DAG: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[BFIMASK]] -; SI: v_cmp_gt_i32_e64 +; SI-DAG: v_cmp_gt_i32_e64 ; SI: buffer_store_dwordx2 diff --git a/llvm/test/CodeGen/R600/sign_extend.ll b/llvm/test/CodeGen/R600/sign_extend.ll index 9550c2a7f06..f19475990c5 100644 --- a/llvm/test/CodeGen/R600/sign_extend.ll +++ b/llvm/test/CodeGen/R600/sign_extend.ll @@ -24,8 +24,9 @@ entry: } ; SI-LABEL: {{^}}s_sext_i1_to_i64: -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 +; SI: v_cndmask_b32_e64 v[[LOREG:[0-9]+]], 0, -1, vcc +; SI: v_mov_b32_e32 v[[HIREG:[0-9]+]], v[[LOREG]] +; SI: buffer_store_dwordx2 v{{\[}}[[LOREG]]:[[HIREG]]{{\]}} ; SI: s_endpgm define void @s_sext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind { %cmp = icmp eq i32 %a, %b |
