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| author | Evan Cheng <evan.cheng@apple.com> | 2009-08-10 07:58:45 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-08-10 07:58:45 +0000 |
| commit | 8a640ae50463f27f26221d212c268bddc0af7045 (patch) | |
| tree | 838d5162c2fce60c5493129fb714c18c93ca2edf | |
| parent | f16a1d5b79d3fef3bd36e852d54ca2a85435f1ea (diff) | |
| download | bcm5719-llvm-8a640ae50463f27f26221d212c268bddc0af7045.tar.gz bcm5719-llvm-8a640ae50463f27f26221d212c268bddc0af7045.zip | |
rev, rev16, and revsh do not set CPSR.
llvm-svn: 78561
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp index 4f648ec4eb8..9a56f2fe86c 100644 --- a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -71,9 +71,9 @@ namespace { { ARM::t2MUL, 0, ARM::tMUL, 0, 0, 0, 1, 0,0, 0 }, { ARM::t2MVNr, ARM::tMVN, 0, 0, 0, 1, 0, 0,0, 0 }, { ARM::t2ORRrr, 0, ARM::tORR, 0, 0, 0, 1, 0,0, 0 }, - { ARM::t2REV, ARM::tREV, 0, 0, 0, 1, 0, 0,0, 0 }, - { ARM::t2REV16, ARM::tREV16, 0, 0, 0, 1, 0, 0,0, 0 }, - { ARM::t2REVSH, ARM::tREVSH, 0, 0, 0, 1, 0, 0,0, 0 }, + { ARM::t2REV, ARM::tREV, 0, 0, 0, 1, 0, 1,0, 0 }, + { ARM::t2REV16, ARM::tREV16, 0, 0, 0, 1, 0, 1,0, 0 }, + { ARM::t2REVSH, ARM::tREVSH, 0, 0, 0, 1, 0, 1,0, 0 }, { ARM::t2RORrr, 0, ARM::tROR, 0, 0, 0, 1, 0,0, 0 }, // FIXME: T2RSBri immediate must be zero. Also need entry for T2RSBS //{ ARM::t2RSBri, ARM::tRSB, 0, 0, 0, 1, 0, 0,0, 0 }, |
