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authorEvan Cheng <evan.cheng@apple.com>2008-11-14 02:33:17 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-11-14 02:33:17 +0000
commit889b79bb86cebf925dd2f47f8e3ab3fedc8b8118 (patch)
treeeab3fc1fb49c6f849d3e45785c0df3deb94926bb
parent99d4ff3c7a3f9c9d12bdb7f2f94de88e2b7605d5 (diff)
downloadbcm5719-llvm-889b79bb86cebf925dd2f47f8e3ab3fedc8b8118.tar.gz
bcm5719-llvm-889b79bb86cebf925dd2f47f8e3ab3fedc8b8118.zip
ARM / Mac OS X also wants to invalidate icache after jitting.
llvm-svn: 59291
-rw-r--r--llvm/lib/System/Memory.cpp42
1 files changed, 22 insertions, 20 deletions
diff --git a/llvm/lib/System/Memory.cpp b/llvm/lib/System/Memory.cpp
index 3660bcb1a4a..375c73cf020 100644
--- a/llvm/lib/System/Memory.cpp
+++ b/llvm/lib/System/Memory.cpp
@@ -35,26 +35,28 @@ extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
size_t Len) {
-// icache invalidation for PPC.
+// icache invalidation for PPC and ARM.
+#if defined(__APPLE__)
#if (defined(__POWERPC__) || defined (__ppc__) || \
- defined(_POWER) || defined(_ARCH_PPC))
- #if defined(__APPLE__)
- sys_icache_invalidate(Addr, Len);
- #elif defined(__GNUC__)
- const size_t LineSize = 32;
-
- const intptr_t Mask = ~(LineSize - 1);
- const intptr_t StartLine = ((intptr_t) Addr) & Mask;
- const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
-
- for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
- asm volatile("dcbf 0, %0" : : "r"(Line));
- asm volatile("sync");
-
- for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
- asm volatile("icbi 0, %0" : : "r"(Line));
- asm volatile("isync");
- #endif
-#endif // end PPC
+ defined(_POWER) || defined(_ARCH_PPC)) || defined(__arm__)
+ sys_icache_invalidate(Addr, Len);
+#endif
+#else
+#if (defined(__POWERPC__) || defined (__ppc__) || \
+ defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
+ const size_t LineSize = 32;
+
+ const intptr_t Mask = ~(LineSize - 1);
+ const intptr_t StartLine = ((intptr_t) Addr) & Mask;
+ const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
+ for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
+ asm volatile("dcbf 0, %0" : : "r"(Line));
+ asm volatile("sync");
+
+ for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
+ asm volatile("icbi 0, %0" : : "r"(Line));
+ asm volatile("isync");
+#endif
+#endif // end apple
}
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