summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJohnny Chen <johnny.chen@apple.com>2011-04-19 22:32:57 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-04-19 22:32:57 +0000
commit85866ba033faa0bd81e39184dfbd2344ee192fc0 (patch)
tree13f79cd47cc8995d753059c1015f325e1990dcad
parent4c20717a8fb2a6bd326d2605f9929296baf0c7fe (diff)
downloadbcm5719-llvm-85866ba033faa0bd81e39184dfbd2344ee192fc0.tar.gz
bcm5719-llvm-85866ba033faa0bd81e39184dfbd2344ee192fc0.zip
Use self.TraceOn() API.
llvm-svn: 129827
-rw-r--r--lldb/test/stl/TestStdCXXDisassembly.py10
1 files changed, 6 insertions, 4 deletions
diff --git a/lldb/test/stl/TestStdCXXDisassembly.py b/lldb/test/stl/TestStdCXXDisassembly.py
index 4f0a2376260..bbefae2a5b5 100644
--- a/lldb/test/stl/TestStdCXXDisassembly.py
+++ b/lldb/test/stl/TestStdCXXDisassembly.py
@@ -94,11 +94,13 @@ class StdCXXDisassembleTestCase(TestBase):
match = codeRE.search(line)
if match:
LA = match.group(1)
- print "line:", line
- print "load address:", LA
- print "SA:", SA
+ if self.TraceOn():
+ print "line:", line
+ print "load address:", LA
+ print "SA:", SA
if SA and LA:
- self.runCmd("disassemble -s %s -e %s" % (SA, LA))
+ if int(LA, 16) > int(SA, 16):
+ self.runCmd("disassemble -s %s -e %s" % (SA, LA))
SA = LA
else:
# This entry is not a Code entry. Reset SA = None.
OpenPOWER on IntegriCloud