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author | Craig Topper <craig.topper@intel.com> | 2018-01-07 06:24:28 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-01-07 06:24:28 +0000 |
commit | 85657d59a966c3db7800399cddb8059b6465e66d (patch) | |
tree | 54152607a4a6c7df08e502111c048a9e5268d4cb | |
parent | 89293a2a94434137dbdfbd883e5c1f01e2be02d2 (diff) | |
download | bcm5719-llvm-85657d59a966c3db7800399cddb8059b6465e66d.tar.gz bcm5719-llvm-85657d59a966c3db7800399cddb8059b6465e66d.zip |
[X86] Don't put any EVEX_B instructions in the tablegen generated load folding tables.
EVEX_B means different things for memory and register forms. The instructions should not be considered equivalent.
llvm-svn: 321954
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 1 | ||||
-rw-r--r-- | llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 5 |
2 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 1a1c9c9feeb..27047ea4c06 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3394,6 +3394,7 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) { X86::VPSUBSWZrrk, X86::VPSUBSWZrmk, 0 }, { X86::VPSUBUSBZrrk, X86::VPSUBUSBZrmk, 0 }, { X86::VPSUBUSWZrrk, X86::VPSUBUSWZrmk, 0 }, + { X86::VPSUBWZrrk, X86::VPSUBWZrmk, 0 }, { X86::VPTERNLOGDZrrik, X86::VPTERNLOGDZrmik, 0 }, { X86::VPTERNLOGQZrrik, X86::VPTERNLOGQZrmik, 0 }, { X86::VPUNPCKHBWZrrk, X86::VPUNPCKHBWZrmk, 0 }, diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp index ff1afa89efc..9772ccf5c61 100644 --- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp @@ -341,8 +341,9 @@ public: MemRec->getValueAsBit("hasEVEX_K") || RegRec->getValueAsBit("hasEVEX_Z") != MemRec->getValueAsBit("hasEVEX_Z") || - RegRec->getValueAsBit("hasEVEX_B") != - MemRec->getValueAsBit("hasEVEX_B") || + // EVEX_B means different things for memory and register forms. + RegRec->getValueAsBit("hasEVEX_B") != 0 || + MemRec->getValueAsBit("hasEVEX_B") != 0 || RegRec->getValueAsBit("hasEVEX_RC") != MemRec->getValueAsBit("hasEVEX_RC") || RegRec->getValueAsBit("hasREX_WPrefix") != |