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| author | Sanjay Patel <spatel@rotateright.com> | 2019-08-01 21:08:08 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-08-01 21:08:08 +0000 |
| commit | 8560ea5534b71c4f4aa02fe6e484e9339d0e4fc0 (patch) | |
| tree | 167fbc581fe293b04130d22d847f8b8518f25c07 | |
| parent | 7740c6d643765f390254706284824b090f985461 (diff) | |
| download | bcm5719-llvm-8560ea5534b71c4f4aa02fe6e484e9339d0e4fc0.tar.gz bcm5719-llvm-8560ea5534b71c4f4aa02fe6e484e9339d0e4fc0.zip | |
[AArch64][x86] adjust tests with shift-add-shift; NFC
Prevent folding away the math completely.
llvm-svn: 367612
| -rw-r--r-- | llvm/test/CodeGen/AArch64/shift-mod.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/shift-combine.ll | 14 |
2 files changed, 14 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AArch64/shift-mod.ll b/llvm/test/CodeGen/AArch64/shift-mod.ll index 839693126f3..9bfd1d835a0 100644 --- a/llvm/test/CodeGen/AArch64/shift-mod.ll +++ b/llvm/test/CodeGen/AArch64/shift-mod.ll @@ -91,10 +91,12 @@ define i64 @ashr_add_shl_i32(i64 %r) { define i64 @ashr_add_shl_i8(i64 %r) { ; CHECK-LABEL: ashr_add_shl_i8: ; CHECK: // %bb.0: -; CHECK-NEXT: sxtb x0, w0 +; CHECK-NEXT: mov x8, #72057594037927936 +; CHECK-NEXT: add x8, x8, x0, lsl #56 +; CHECK-NEXT: asr x0, x8, #56 ; CHECK-NEXT: ret %conv = shl i64 %r, 56 - %sext = add i64 %conv, 4294967296 + %sext = add i64 %conv, 72057594037927936 %conv1 = ashr i64 %sext, 56 ret i64 %conv1 } diff --git a/llvm/test/CodeGen/X86/shift-combine.ll b/llvm/test/CodeGen/X86/shift-combine.ll index 28f91b82463..f0bb9a1229d 100644 --- a/llvm/test/CodeGen/X86/shift-combine.ll +++ b/llvm/test/CodeGen/X86/shift-combine.ll @@ -182,17 +182,23 @@ define i64 @ashr_add_shl_i32(i64 %r) nounwind { define i64 @ashr_add_shl_i8(i64 %r) nounwind { ; X32-LABEL: ashr_add_shl_i8: ; X32: # %bb.0: -; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl %eax, %edx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: shll $24, %edx +; X32-NEXT: addl $16777216, %edx # imm = 0x1000000 +; X32-NEXT: movl %edx, %eax +; X32-NEXT: sarl $24, %eax ; X32-NEXT: sarl $31, %edx ; X32-NEXT: retl ; ; X64-LABEL: ashr_add_shl_i8: ; X64: # %bb.0: -; X64-NEXT: movsbq %dil, %rax +; X64-NEXT: shlq $56, %rdi +; X64-NEXT: movabsq $72057594037927936, %rax # imm = 0x100000000000000 +; X64-NEXT: addq %rdi, %rax +; X64-NEXT: sarq $56, %rax ; X64-NEXT: retq %conv = shl i64 %r, 56 - %sext = add i64 %conv, 4294967296 + %sext = add i64 %conv, 72057594037927936 %conv1 = ashr i64 %sext, 56 ret i64 %conv1 } |
