diff options
| author | Peter Smith <peter.smith@linaro.org> | 2018-05-17 13:17:33 +0000 |
|---|---|---|
| committer | Peter Smith <peter.smith@linaro.org> | 2018-05-17 13:17:33 +0000 |
| commit | 84a9c481f5916d26bd64d27b29465f52549754ad (patch) | |
| tree | b83ef29d24a6bc9731422c48770d44d248eaeb7c | |
| parent | 0c0336e003ba227d28a42b5eba55d0c96b244983 (diff) | |
| download | bcm5719-llvm-84a9c481f5916d26bd64d27b29465f52549754ad.tar.gz bcm5719-llvm-84a9c481f5916d26bd64d27b29465f52549754ad.zip | |
[AArch64] Correct inline assembly test case for S modifier [NFC]
The existing test for the AArch64 inline assembly constraint S uses the
A and L modifiers. These modifiers were implemented in the original
AArch64 backend but were not carried forward to the merged backend. The
A is associated with ADRP and does nothing, the L is associated with
:lo12: . Given that A and L are not supported by GCC and not supported
by the new implementation of constraint S in LLVM (see D46745) I've
altered the test to put :lo12: directly in the string so that A and L
are not needed.
Differential Revision: https://reviews.llvm.org/D46932
llvm-svn: 332606
| -rw-r--r-- | clang/test/CodeGen/aarch64-inline-asm.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/clang/test/CodeGen/aarch64-inline-asm.c b/clang/test/CodeGen/aarch64-inline-asm.c index 264df9d5fc0..0889a7157f0 100644 --- a/clang/test/CodeGen/aarch64-inline-asm.c +++ b/clang/test/CodeGen/aarch64-inline-asm.c @@ -44,9 +44,9 @@ void test_constraints_immed(void) { void test_constraint_S(void) { int *addr; - asm("adrp %0, %A1\n\t" - "add %0, %0, %L1" : "=r"(addr) : "S"(&var)); -// CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* @var) + asm("adrp %0, %1\n\t" + "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var)); +// CHECK: call i32* asm "adrp $0, $1\0A\09add $0, $0, :lo12:$1", "=r,S"(i64* @var) } void test_constraint_Q(void) { |
