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| author | Aaron Watry <awatry@gmail.com> | 2013-06-25 13:55:46 +0000 |
|---|---|---|
| committer | Aaron Watry <awatry@gmail.com> | 2013-06-25 13:55:46 +0000 |
| commit | 83fa6006bcc3a0b82b4aeddb0cca8a4cdd32f0fc (patch) | |
| tree | f150379b5662908d946b75f6d374c374cb82dd3c | |
| parent | 5527b6c6b6d1e24fc3281b561d9dc8e589ff4598 (diff) | |
| download | bcm5719-llvm-83fa6006bcc3a0b82b4aeddb0cca8a4cdd32f0fc.tar.gz bcm5719-llvm-83fa6006bcc3a0b82b4aeddb0cca8a4cdd32f0fc.zip | |
R600/SI: Expand urem of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.
Note: I followed the guidance of the v4i32 EG check... UREM produces really
complex code, so let's just check that the instruction was lowered
successfully.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 184844
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/urem.ll | 27 |
2 files changed, 26 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 1fb28fac0f1..a7846679530 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -90,6 +90,9 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : setOperationAction(ISD::UDIV, MVT::v2i32, Expand); setOperationAction(ISD::UDIV, MVT::v4i32, Expand); + setOperationAction(ISD::UREM, MVT::v2i32, Expand); + setOperationAction(ISD::UREM, MVT::v4i32, Expand); + setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); diff --git a/llvm/test/CodeGen/R600/urem.ll b/llvm/test/CodeGen/R600/urem.ll index a2cc0bd2e84..cf3474c58ca 100644 --- a/llvm/test/CodeGen/R600/urem.ll +++ b/llvm/test/CodeGen/R600/urem.ll @@ -1,11 +1,30 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s ;The code generated by urem is long and complex and may frequently change. ;The goal of this test is to make sure the ISel doesn't fail when it gets -;a v4i32 urem -;CHECK: CF_END +;a v2i32/v4i32 urem -define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { +;EG-CHECK: @test2 +;EG-CHECK: CF_END +;SI-CHECK: @test2 +;SI-CHECK: S_ENDPGM + +define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { + %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1 + %a = load <2 x i32> addrspace(1) * %in + %b = load <2 x i32> addrspace(1) * %b_ptr + %result = urem <2 x i32> %a, %b + store <2 x i32> %result, <2 x i32> addrspace(1)* %out + ret void +} + +;EG-CHECK: @test4 +;EG-CHECK: CF_END +;SI-CHECK: @test4 +;SI-CHECK: S_ENDPGM + +define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 %a = load <4 x i32> addrspace(1) * %in %b = load <4 x i32> addrspace(1) * %b_ptr |
