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| author | Juergen Ributzka <juergen@apple.com> | 2014-08-27 20:47:33 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-08-27 20:47:33 +0000 |
| commit | 833bc681e32b5aba400ed47ad4da27686d86ce19 (patch) | |
| tree | 3e41838c6410be64e7fc332f7f61133571152930 | |
| parent | 0b9bab48bb67e4a1c1eebc811fbd5c80d2e64803 (diff) | |
| download | bcm5719-llvm-833bc681e32b5aba400ed47ad4da27686d86ce19.tar.gz bcm5719-llvm-833bc681e32b5aba400ed47ad4da27686d86ce19.zip | |
[FastISel] Fix a potential bug in FastEmitInst_ri
FastEmitInst_ri was constraining the first operand without checking if it is
a virtual register. Use constrainOperandRegClass as all the other
FastEmitInst_* functions.
llvm-svn: 216613
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index ec0531e04d4..0a81662e9a3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1816,8 +1816,7 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, const MCInstrDesc &II = TII.get(MachineInstOpcode); unsigned ResultReg = createResultReg(RC); - RC = TII.getRegClass(II, II.getNumDefs(), &TRI, *FuncInfo.MF); - MRI.constrainRegClass(Op0, RC); + Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); if (II.getNumDefs() >= 1) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) |
