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author | Michael Gottesman <mgottesman@apple.com> | 2013-01-03 08:18:30 +0000 |
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committer | Michael Gottesman <mgottesman@apple.com> | 2013-01-03 08:18:30 +0000 |
commit | 820aac1c783e39c863bb99e33d5c98fd7f06c8e4 (patch) | |
tree | 9c73e2e4d1f92225875838ee66a558d07e198f01 | |
parent | 50ae5b28e93061a87b4c8fcbcf89af2227f764af (diff) | |
download | bcm5719-llvm-820aac1c783e39c863bb99e33d5c98fd7f06c8e4.tar.gz bcm5719-llvm-820aac1c783e39c863bb99e33d5c98fd7f06c8e4.zip |
Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks."
This reverts commit r171461 since it breaks the following tests:
Clang :: Analysis/outofbound-notwork.c
Clang :: Analysis/string-fail.c
Clang :: CXX/basic/basic.lookup/basic.lookup.qual/p6-0x.cpp
Clang :: CXX/basic/basic.lookup/basic.lookup.unqual/p15.cpp
Clang :: CXX/dcl.dcl/dcl.spec/dcl.fct.spec/p4.cpp
Clang :: CXX/dcl.dcl/dcl.spec/dcl.stc/p10.cpp
Clang :: CXX/temp/temp.param/p14.cpp
Clang :: CXX/temp/temp.res/temp.dep.res/temp.point/p1.cpp
Clang :: CodeGen/2009-02-13-zerosize-union-field-ppc.c
Clang :: CodeGen/blocks-2.c
Clang :: CodeGen/libcalls-d.c
Clang :: CodeGen/libcalls-ld.c
Clang :: CodeGenCXX/conversion-function.cpp
Clang :: CodeGenCXX/debug-info-limit-type.cpp
Clang :: CodeGenCXX/inheriting-constructor.cpp
Clang :: FixIt/fixit-errors.c
Clang :: FixIt/fixit-pmem.cpp
Clang :: Modules/namespaces.cpp
Clang :: PCH/changed-files.c
Clang :: PCH/pr4489.c
Clang :: PCH/source-manager-stack.c
Clang :: Parser/cxx-ambig-decl-expr-xfail.cpp
Clang :: SemaCXX/switch-implicit-fallthrough-cxx98.cpp
Clang :: SemaTemplate/instantiate-function-1.mm
llvm-svn: 171466
-rw-r--r-- | llvm/lib/Target/X86/X86InstrArithmetic.td | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/early-ifcvt.ll | 32 |
2 files changed, 1 insertions, 33 deletions
diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td index 3540fc31257..d56763ea9d2 100644 --- a/llvm/lib/Target/X86/X86InstrArithmetic.td +++ b/llvm/lib/Target/X86/X86InstrArithmetic.td @@ -266,7 +266,7 @@ def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8 // unsigned division/remainder -let hasSideEffects = 1 in { // so that we don't speculatively execute +let hasSideEffects = 0 in { let Defs = [AL,EFLAGS,AX], Uses = [AX] in def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH "div{b}\t$src", [], IIC_DIV8_REG>; diff --git a/llvm/test/CodeGen/X86/early-ifcvt.ll b/llvm/test/CodeGen/X86/early-ifcvt.ll index b3a20c3ee0b..2e1852d3e3a 100644 --- a/llvm/test/CodeGen/X86/early-ifcvt.ll +++ b/llvm/test/CodeGen/X86/early-ifcvt.ll @@ -142,35 +142,3 @@ save_state_and_return: } declare void @BZ2_bz__AssertH__fail() - - -; Make sure we don't speculate on div/idiv instructions -; CHECK: test_idiv -; CHECK-NOT: cmov -define i32 @test_idiv(i32 %a, i32 %b) nounwind uwtable readnone ssp { - %1 = icmp eq i32 %b, 0 - br i1 %1, label %4, label %2 - -; <label>:2 ; preds = %0 - %3 = sdiv i32 %a, %b - br label %4 - -; <label>:4 ; preds = %0, %2 - %5 = phi i32 [ %3, %2 ], [ %a, %0 ] - ret i32 %5 -} - -; CHECK: test_div -; CHECK-NOT: cmov -define i32 @test_div(i32 %a, i32 %b) nounwind uwtable readnone ssp { - %1 = icmp eq i32 %b, 0 - br i1 %1, label %4, label %2 - -; <label>:2 ; preds = %0 - %3 = udiv i32 %a, %b - br label %4 - -; <label>:4 ; preds = %0, %2 - %5 = phi i32 [ %3, %2 ], [ %a, %0 ] - ret i32 %5 -} |