diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-07 21:10:13 +0000 | 
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-07 21:10:13 +0000 | 
| commit | 81d06015c6c637a5ec0619a0f70493b3de837290 (patch) | |
| tree | dd79d7d2c378b7a3a95d4bf12e57ba3432e6c37d | |
| parent | ceb2c06cbd20ed7288615188fe20a84a311b0818 (diff) | |
| download | bcm5719-llvm-81d06015c6c637a5ec0619a0f70493b3de837290.tar.gz bcm5719-llvm-81d06015c6c637a5ec0619a0f70493b3de837290.zip  | |
AMDGPU: Move function only used by R600
llvm-svn: 262853
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 17 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.h | 1 | 
4 files changed, 17 insertions, 18 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index a935992c3da..e8bd7cdb452 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -647,7 +647,6 @@ SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op,    case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);    case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG);    case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG); -  case ISD::FrameIndex: return LowerFrameIndex(Op, DAG);    case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);    case ISD::UDIVREM: return LowerUDIVREM(Op, DAG);    case ISD::SDIVREM: return LowerSDIVREM(Op, DAG); @@ -890,22 +889,6 @@ SDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,    return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args);  } -SDValue AMDGPUTargetLowering::LowerFrameIndex(SDValue Op, -                                              SelectionDAG &DAG) const { - -  MachineFunction &MF = DAG.getMachineFunction(); -  const AMDGPUFrameLowering *TFL = Subtarget->getFrameLowering(); - -  FrameIndexSDNode *FIN = cast<FrameIndexSDNode>(Op); - -  unsigned FrameIndex = FIN->getIndex(); -  unsigned IgnoredFrameReg; -  unsigned Offset = -      TFL->getFrameIndexReference(MF, FrameIndex, IgnoredFrameReg); -  return DAG.getConstant(Offset * 4 * TFL->getStackWidth(MF), SDLoc(Op), -                         Op.getValueType()); -} -  SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,      SelectionDAG &DAG) const {    unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h index 4965a565be7..0748e118848 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h @@ -32,7 +32,6 @@ protected:                                     const SDValue &InitPtr,                                     SDValue Chain,                                     SelectionDAG &DAG) const; -  SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index be5b30d28c8..fa3ee7b92cb 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -610,6 +610,7 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const    case ISD::BRCOND: return LowerBRCOND(Op, DAG);    case ISD::GlobalAddress: return LowerGlobalAddress(MFI, Op, DAG); +  case ISD::FrameIndex: return lowerFrameIndex(Op, DAG);    case ISD::INTRINSIC_VOID: {      SDValue Chain = Op.getOperand(0);      unsigned IntrinsicID = @@ -1697,6 +1698,21 @@ SDValue R600TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {                       Chain, Jump, Cond);  } +SDValue R600TargetLowering::lowerFrameIndex(SDValue Op, +                                            SelectionDAG &DAG) const { +  MachineFunction &MF = DAG.getMachineFunction(); +  const AMDGPUFrameLowering *TFL = Subtarget->getFrameLowering(); + +  FrameIndexSDNode *FIN = cast<FrameIndexSDNode>(Op); + +  unsigned FrameIndex = FIN->getIndex(); +  unsigned IgnoredFrameReg; +  unsigned Offset = +    TFL->getFrameIndexReference(MF, FrameIndex, IgnoredFrameReg); +  return DAG.getConstant(Offset * 4 * TFL->getStackWidth(MF), SDLoc(Op), +                         Op.getValueType()); +} +  /// XXX Only kernel functions are supported, so we can assume for now that  /// every function is a kernel function, but in the future we should use  /// separate calling conventions for kernel and non-kernel functions. diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.h b/llvm/lib/Target/AMDGPU/R600ISelLowering.h index fc68f9045c0..31eef305e81 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.h +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.h @@ -60,6 +60,7 @@ private:                            SDLoc DL) const;    SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const; +  SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;    SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;  | 

