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| author | Heejin Ahn <aheejin@gmail.com> | 2018-07-05 21:27:09 +0000 |
|---|---|---|
| committer | Heejin Ahn <aheejin@gmail.com> | 2018-07-05 21:27:09 +0000 |
| commit | 80d9f1708f784c10a320edba2a3ed650a70a224c (patch) | |
| tree | ad7483c28f8bb294420e73df37c4173017822e13 | |
| parent | e69ba6e6d56c9c3ecbd3762857a049fc036ea84b (diff) | |
| download | bcm5719-llvm-80d9f1708f784c10a320edba2a3ed650a70a224c.tar.gz bcm5719-llvm-80d9f1708f784c10a320edba2a3ed650a70a224c.zip | |
[WebAssembly] Add missing _S opcodes of atomic stores to InstPrinter
Summary: This was missing in D48839 (rL336145).
Reviewers: aardappel
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D48992
llvm-svn: 336390
| -rw-r--r-- | llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h index 4a224cb8858..8575601e79a 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h @@ -125,7 +125,9 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) { case WebAssembly::STORE8_I64: case WebAssembly::STORE8_I64_S: case WebAssembly::ATOMIC_STORE8_I32: + case WebAssembly::ATOMIC_STORE8_I32_S: case WebAssembly::ATOMIC_STORE8_I64: + case WebAssembly::ATOMIC_STORE8_I64_S: return 0; case WebAssembly::LOAD16_S_I32: case WebAssembly::LOAD16_S_I32_S: @@ -144,7 +146,9 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) { case WebAssembly::STORE16_I64: case WebAssembly::STORE16_I64_S: case WebAssembly::ATOMIC_STORE16_I32: + case WebAssembly::ATOMIC_STORE16_I32_S: case WebAssembly::ATOMIC_STORE16_I64: + case WebAssembly::ATOMIC_STORE16_I64_S: return 1; case WebAssembly::LOAD_I32: case WebAssembly::LOAD_I32_S: @@ -165,7 +169,9 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) { case WebAssembly::ATOMIC_LOAD32_U_I64: case WebAssembly::ATOMIC_LOAD32_U_I64_S: case WebAssembly::ATOMIC_STORE_I32: + case WebAssembly::ATOMIC_STORE_I32_S: case WebAssembly::ATOMIC_STORE32_I64: + case WebAssembly::ATOMIC_STORE32_I64_S: return 2; case WebAssembly::LOAD_I64: case WebAssembly::LOAD_I64_S: @@ -178,6 +184,7 @@ inline unsigned GetDefaultP2Align(unsigned Opcode) { case WebAssembly::ATOMIC_LOAD_I64: case WebAssembly::ATOMIC_LOAD_I64_S: case WebAssembly::ATOMIC_STORE_I64: + case WebAssembly::ATOMIC_STORE_I64_S: return 3; default: llvm_unreachable("Only loads and stores have p2align values"); |
