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authorSanjiv Gupta <sanjiv.gupta@microchip.com>2009-06-04 08:52:28 +0000
committerSanjiv Gupta <sanjiv.gupta@microchip.com>2009-06-04 08:52:28 +0000
commit7ff7621a1d7abdafa510847ee6965196dc184ec1 (patch)
tree9bc226fe57282b9b15927877e5ea05ceae533b25
parent63e44bb2a99c77d98d1522f0fae09ca33a20ea17 (diff)
downloadbcm5719-llvm-7ff7621a1d7abdafa510847ee6965196dc184ec1.tar.gz
bcm5719-llvm-7ff7621a1d7abdafa510847ee6965196dc184ec1.zip
Custom lower SUB with two register operands.
llvm-svn: 72861
-rw-r--r--llvm/lib/Target/PIC16/PIC16ISelLowering.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp b/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
index 0f83fd2353a..d9d387abf94 100644
--- a/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -105,6 +105,7 @@ PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
setOperationAction(ISD::ADDC, MVT::i8, Custom);
setOperationAction(ISD::SUBE, MVT::i8, Custom);
setOperationAction(ISD::SUBC, MVT::i8, Custom);
+ setOperationAction(ISD::SUB, MVT::i8, Custom);
setOperationAction(ISD::ADD, MVT::i8, Custom);
setOperationAction(ISD::ADD, MVT::i16, Custom);
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