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| author | Chris Lattner <sabre@nondot.org> | 2002-12-01 23:24:58 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2002-12-01 23:24:58 +0000 |
| commit | 7dcb1436dab79d8e2f3438402604fbf8d8c78385 (patch) | |
| tree | d4b2aa008ef47210e8768e3c2ea0c670f903b97d | |
| parent | 2ad3501d3fbb656a08f53388799481dd806df126 (diff) | |
| download | bcm5719-llvm-7dcb1436dab79d8e2f3438402604fbf8d8c78385.tar.gz bcm5719-llvm-7dcb1436dab79d8e2f3438402604fbf8d8c78385.zip | |
Don't add implicit regs
llvm-svn: 4840
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index 992fba72ca6..d9facda10e9 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -502,7 +502,7 @@ void ISel::visitDivRem(BinaryOperator &I) { if (isSigned) { // Emit a sign extension instruction... - BuildMI(BB, ExtOpcode[Class], 1, ExtReg).addReg(Reg); + BuildMI(BB, ExtOpcode[Class], 0); } else { // If unsigned, emit a zeroing instruction... (reg = xor reg, reg) BuildMI(BB, ClrOpcode[Class], 2, ExtReg).addReg(ExtReg).addReg(ExtReg); |
