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authorJinsong Ji <jji@us.ibm.com>2019-06-28 18:07:19 +0000
committerJinsong Ji <jji@us.ibm.com>2019-06-28 18:07:19 +0000
commit7d78e5cc81150ce8bddb53dcbb4f70e3ee409882 (patch)
treefee454267e292859d3bd2edbfdd6b93277ed63e9
parent978a08c8854f2b244f33c805df12c2a79ebd52a6 (diff)
downloadbcm5719-llvm-7d78e5cc81150ce8bddb53dcbb4f70e3ee409882.tar.gz
bcm5719-llvm-7d78e5cc81150ce8bddb53dcbb4f70e3ee409882.zip
[UpdateChecks] Add support for armv7-apple-darwin
armv7-apple-darwin was not supported well, the script can't generate checks. https://reviews.llvm.org/D60601/new/#inline-568671 Differential Revision: https://reviews.llvm.org/D63939 llvm-svn: 364668
-rw-r--r--llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll14
-rw-r--r--llvm/utils/UpdateTestChecks/asm.py9
2 files changed, 21 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll b/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll
index d00f44e8e88..19227b0de31 100644
--- a/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll
+++ b/llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll
@@ -1,17 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
; Check if the f32 load / store pair are optimized to i32 load / store.
; rdar://8944252
define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind {
; CHECK-LABEL: t:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: cmp r0, #0
+; CHECK-NEXT: bxeq lr
+; CHECK-NEXT: LBB0_1: @ %bb
+; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr r9, [r1], r3
+; CHECK-NEXT: subs r0, r0, #1
+; CHECK-NEXT: str r9, [r2], #4
+; CHECK-NEXT: bne LBB0_1
+; CHECK-NEXT: @ %bb.2: @ %return
+; CHECK-NEXT: bx lr
entry:
%src6 = bitcast float* %src to i8*
%0 = icmp eq i32 %width, 0
br i1 %0, label %return, label %bb
bb:
-; CHECK: ldr [[REGISTER:(r[0-9]+)]], [{{r[0-9]+}}], {{r[0-9]+}}
-; CHECK: str [[REGISTER]], [{{r[0-9]+}}], #4
%j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]
%tmp = mul i32 %j.05, %index
%uglygep = getelementptr i8, i8* %src6, i32 %tmp
diff --git a/llvm/utils/UpdateTestChecks/asm.py b/llvm/utils/UpdateTestChecks/asm.py
index 5cb4feaecdd..ab649497e8a 100644
--- a/llvm/utils/UpdateTestChecks/asm.py
+++ b/llvm/utils/UpdateTestChecks/asm.py
@@ -104,6 +104,14 @@ ASM_FUNCTION_AARCH64_DARWIN_RE = re.compile(
r'^[ \t]*;[ \t]--[ \t]End[ \t]function',
flags=(re.M | re.S))
+ASM_FUNCTION_ARM_DARWIN_RE = re.compile(
+ r'^[ \t]*\.globl[ \t]*_(?P<func>[^ \t])[ \t]*@[ \t]--[ \t]Begin[ \t]function[ \t](?P=func)'
+ r'(?P<directives>.*?)'
+ r'^_(?P=func):\n[ \t]*'
+ r'(?P<body>.*?)'
+ r'^[ \t]*@[ \t]--[ \t]End[ \t]function',
+ flags=(re.M | re.S ))
+
ASM_FUNCTION_ARM_MACHO_RE = re.compile(
r'^_(?P<func>[^:]+):[ \t]*\n'
r'([ \t]*.cfi_startproc\n[ \t]*)?'
@@ -301,6 +309,7 @@ def build_function_body_dictionary_for_triple(args, raw_tool_output, triple, pre
'arm64': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE),
'arm64-apple-ios': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
'armv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE),
+ 'armv7-apple-darwin': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_DARWIN_RE),
'thumb': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumb-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
'thumbv5-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
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