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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-20 21:05:40 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-20 21:05:40 +0000 |
| commit | 7cccd2672e1a063a843654ace3959be3da1318d6 (patch) | |
| tree | b5f702ddd5ff84faefbab5bcc712ef1907c6c86a | |
| parent | 105cf2b179e0cbedcb2452026a0689feceef8e32 (diff) | |
| download | bcm5719-llvm-7cccd2672e1a063a843654ace3959be3da1318d6.tar.gz bcm5719-llvm-7cccd2672e1a063a843654ace3959be3da1318d6.zip | |
AMDGPU: Remove AMDIL.round.nearest intrinsic
llvm-svn: 258346
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.rint.ll | 12 |
3 files changed, 0 insertions, 15 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 58db515b673..ac740af990d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -1046,8 +1046,6 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, case AMDGPUIntrinsic::AMDIL_exp: // Legacy name. return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); - case AMDGPUIntrinsic::AMDIL_round_nearest: // Legacy name. - return DAG.getNode(ISD::FRINT, DL, VT, Op.getOperand(1)); case AMDGPUIntrinsic::AMDGPU_trunc: // Legacy name. return DAG.getNode(ISD::FTRUNC, DL, VT, Op.getOperand(1)); case AMDGPUIntrinsic::AMDGPU_brev: // Legacy name diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td index 530651e3c73..fbbd9b672c5 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td @@ -74,7 +74,6 @@ let TargetPrefix = "AMDIL", isTarget = 1 in { def int_AMDIL_fraction : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; def int_AMDIL_clamp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>; def int_AMDIL_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; - def int_AMDIL_round_nearest : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; } let TargetPrefix = "TGSI", isTarget = 1 in { diff --git a/llvm/test/CodeGen/AMDGPU/llvm.rint.ll b/llvm/test/CodeGen/AMDGPU/llvm.rint.ll index 661db51ad03..b65a66995e8 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.rint.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.rint.ll @@ -43,18 +43,6 @@ entry: ret void } -; FUNC-LABEL: {{^}}legacy_amdil_round_nearest_f32: -; R600: RNDNE - -; SI: v_rndne_f32_e32 -define void @legacy_amdil_round_nearest_f32(float addrspace(1)* %out, float %in) { -entry: - %0 = call float @llvm.AMDIL.round.nearest.f32(float %in) #0 - store float %0, float addrspace(1)* %out - ret void -} - -declare float @llvm.AMDIL.round.nearest.f32(float) #0 declare float @llvm.rint.f32(float) #0 declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0 declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0 |
