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| author | Reed Kotler <rkotler@mips.com> | 2012-12-20 06:06:35 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2012-12-20 06:06:35 +0000 |
| commit | 7bff8f1d7adfaa5d6de77100445eab0d3676de27 (patch) | |
| tree | 1c464e075b7cf62c4fd99cefbb77ca9b412b81f5 | |
| parent | fb8ac2df0914cb3f37fdc8bab43de24213beadd6 (diff) | |
| download | bcm5719-llvm-7bff8f1d7adfaa5d6de77100445eab0d3676de27.tar.gz bcm5719-llvm-7bff8f1d7adfaa5d6de77100445eab0d3676de27.zip | |
set register class properly for mips16 here
llvm-svn: 170669
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index e3abd3e1af4..dd44adb044b 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3099,7 +3099,8 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, const TargetRegisterClass *RC; if (RegVT == MVT::i32) - RC = &Mips::CPURegsRegClass; + RC = Subtarget->inMips16Mode()? &Mips::CPU16RegsRegClass : + &Mips::CPURegsRegClass; else if (RegVT == MVT::i64) RC = &Mips::CPU64RegsRegClass; else if (RegVT == MVT::f32) |
