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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-06-18 17:05:22 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-06-18 17:05:22 +0000
commit7aeb813b2a61e87684832095441439378e33a3d4 (patch)
treeafe25e0521e0a47fd8644fce42df21fcc2315e99
parent520e7c44c1b692f1865694033c14def87bbd671f (diff)
downloadbcm5719-llvm-7aeb813b2a61e87684832095441439378e33a3d4.tar.gz
bcm5719-llvm-7aeb813b2a61e87684832095441439378e33a3d4.zip
R600/SI: Temporary fix for f64 fneg
This should be a source modifier, but this unblocks most of my math patches. llvm-svn: 211181
-rw-r--r--llvm/lib/Target/R600/SIISelLowering.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp
index 846aeb63093..f9b466709af 100644
--- a/llvm/lib/Target/R600/SIISelLowering.cpp
+++ b/llvm/lib/Target/R600/SIISelLowering.cpp
@@ -212,6 +212,10 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FRINT, MVT::f64, Legal);
}
+ // FIXME: This should be removed and handled the same was as f32 fneg. Source
+ // modifiers also work for the double instructions.
+ setOperationAction(ISD::FNEG, MVT::f64, Expand);
+
setTargetDAGCombine(ISD::SELECT_CC);
setTargetDAGCombine(ISD::SETCC);
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