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| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-20 02:18:41 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-20 02:18:41 +0000 |
| commit | 7a3e750fd24619f60d68f05b2605ecb3196bb6d3 (patch) | |
| tree | d6982b150f95a96f0105a9a37c2e0ecf13b3be58 | |
| parent | a7cca362af67017b8f1142373878ff090b93bc85 (diff) | |
| download | bcm5719-llvm-7a3e750fd24619f60d68f05b2605ecb3196bb6d3.tar.gz bcm5719-llvm-7a3e750fd24619f60d68f05b2605ecb3196bb6d3.zip | |
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll | 14 |
3 files changed, 19 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f33946cdcc6..f6318495e0f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2400,7 +2400,9 @@ SDOperand DAGCombiner::visitSRA(SDNode *N) { // If the shift wouldn't be a noop, the truncated type is an actual type, // and the truncate is free, then proceed with the transform. - if (ShiftAmt != 0 && TLI.isTruncateFree(VT, TruncVT)) { + if (ShiftAmt != 0 && + TLI.isTypeLegal(TruncVT) && + TLI.isTruncateFree(VT, TruncVT)) { SDOperand Amt = DAG.getConstant(ShiftAmt, TLI.getShiftAmountTy()); SDOperand Shift = DAG.getNode(ISD::SRL, VT, N0.getOperand(0), Amt); SDOperand Trunc = DAG.getNode(ISD::TRUNCATE, TruncVT, Shift); diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 93fb802241c..5a05abac898 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5662,7 +5662,7 @@ bool X86TargetLowering::isTruncateFree(const Type *Ty1, const Type *Ty2) const { return false; unsigned NumBits1 = Ty1->getPrimitiveSizeInBits(); unsigned NumBits2 = Ty2->getPrimitiveSizeInBits(); - if (NumBits1 <= NumBits2 || NumBits2 < 8) + if (NumBits1 <= NumBits2) return false; return Subtarget->is64Bit() || NumBits1 < 64; } @@ -5673,7 +5673,7 @@ bool X86TargetLowering::isTruncateFree(MVT::ValueType VT1, return false; unsigned NumBits1 = MVT::getSizeInBits(VT1); unsigned NumBits2 = MVT::getSizeInBits(VT2); - if (NumBits1 <= NumBits2 || NumBits2 < 8) + if (NumBits1 <= NumBits2) return false; return Subtarget->is64Bit() || NumBits1 < 64; } diff --git a/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll new file mode 100644 index 00000000000..2fad32a36c3 --- /dev/null +++ b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define i32 @t() nounwind { +entry: + %tmp54 = add i32 0, 1 ; <i32> [#uses=1] + br i1 false, label %bb71, label %bb77 +bb71: ; preds = %entry + %tmp74 = shl i32 %tmp54, 1 ; <i32> [#uses=1] + %tmp76 = ashr i32 %tmp74, 3 ; <i32> [#uses=1] + br label %bb77 +bb77: ; preds = %bb71, %entry + %payLoadSize.0 = phi i32 [ %tmp76, %bb71 ], [ 0, %entry ] ; <i32> [#uses=0] + unreachable +} |
