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| author | Weiming Zhao <weimingz@codeaurora.org> | 2014-11-19 00:29:14 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2014-11-19 00:29:14 +0000 |
| commit | 7a2d15678e729558529e3a14205d2924b3091f5c (patch) | |
| tree | 6df942ea2399da32a192116b0f2c5472560e497c | |
| parent | c9d251e4d17c47504702d0a5b040ac20414f5ba7 (diff) | |
| download | bcm5719-llvm-7a2d15678e729558529e3a14205d2924b3091f5c.tar.gz bcm5719-llvm-7a2d15678e729558529e3a14205d2924b3091f5c.zip | |
[Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability
llvm-svn: 222292
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-popcnt.ll | 14 |
2 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 04ea60c51b0..275ae6e5c42 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -3433,6 +3433,9 @@ SDValue AArch64TargetLowering::LowerCTPOP(SDValue Op, SelectionDAG &DAG) const { AttributeSet::FunctionIndex, Attribute::NoImplicitFloat)) return SDValue(); + if (!Subtarget->hasNEON()) + return SDValue(); + // While there is no integer popcount instruction, it can // be more efficiently lowered to the following sequence that uses // AdvSIMD registers/instructions as long as the copies to/from diff --git a/llvm/test/CodeGen/AArch64/arm64-popcnt.ll b/llvm/test/CodeGen/AArch64/arm64-popcnt.ll index 2afade2ee75..117ab3a5e05 100644 --- a/llvm/test/CodeGen/AArch64/arm64-popcnt.ll +++ b/llvm/test/CodeGen/AArch64/arm64-popcnt.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s +; RUN: llc < %s -march=aarch64 -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s define i32 @cnt32_advsimd(i32 %x) nounwind readnone { %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) @@ -8,6 +9,13 @@ define i32 @cnt32_advsimd(i32 %x) nounwind readnone { ; CHECK: uaddlv.8b h0, v0 ; CHECK: fmov w0, s0 ; CHECK: ret +; CHECK-NONEON-LABEL: cnt32_advsimd +; CHECK-NONEON-NOT: 8b +; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x55555555 +; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x33333333 +; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0xf0f0f0f +; CHECK-NONEON: mul + } define i64 @cnt64_advsimd(i64 %x) nounwind readnone { @@ -18,6 +26,12 @@ define i64 @cnt64_advsimd(i64 %x) nounwind readnone { ; CHECK: uaddlv.8b h0, v0 ; CHECK: fmov w0, s0 ; CHECK: ret +; CHECK-NONEON-LABEL: cnt64_advsimd +; CHECK-NONEON-NOT: 8b +; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x5555555555555555 +; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x3333333333333333 +; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0xf0f0f0f0f0f0f0f +; CHECK-NONEON: mul } ; Do not use AdvSIMD when -mno-implicit-float is specified. |
