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authorEric Christopher <echristo@gmail.com>2015-02-06 18:44:18 +0000
committerEric Christopher <echristo@gmail.com>2015-02-06 18:44:18 +0000
commit79f5e4ede5a53d94a9c657ef56a1a2daae1e3b0f (patch)
tree2be5a0626c4259c7899cd91828365dbdd998caeb
parenta8cb36ea4334f3c0a65981f6f5ca4c81a1599717 (diff)
downloadbcm5719-llvm-79f5e4ede5a53d94a9c657ef56a1a2daae1e3b0f.tar.gz
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Inline asm IR input register constraints don't have early clobber
modifiers on them. If we have a matching output constraint with an early clobber make sure we don't propagate that to the input constraint. llvm-svn: 228422
-rw-r--r--clang/lib/CodeGen/CGStmt.cpp7
-rw-r--r--clang/test/CodeGen/inline-asm-matching-constraint.c11
2 files changed, 14 insertions, 4 deletions
diff --git a/clang/lib/CodeGen/CGStmt.cpp b/clang/lib/CodeGen/CGStmt.cpp
index 8e1c7f2d197..d921c0d9b97 100644
--- a/clang/lib/CodeGen/CGStmt.cpp
+++ b/clang/lib/CodeGen/CGStmt.cpp
@@ -1957,10 +1957,9 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
InputConstraint = SimplifyConstraint(InputConstraint.c_str(), getTarget(),
&OutputConstraintInfos);
- InputConstraint =
- AddVariableConstraints(InputConstraint,
- *InputExpr->IgnoreParenNoopCasts(getContext()),
- getTarget(), CGM, S, Info.earlyClobber());
+ InputConstraint = AddVariableConstraints(
+ InputConstraint, *InputExpr->IgnoreParenNoopCasts(getContext()),
+ getTarget(), CGM, S, false /* No EarlyClobber */);
llvm::Value *Arg = EmitAsmInput(Info, InputExpr, Constraints);
diff --git a/clang/test/CodeGen/inline-asm-matching-constraint.c b/clang/test/CodeGen/inline-asm-matching-constraint.c
new file mode 100644
index 00000000000..7d073b17b70
--- /dev/null
+++ b/clang/test/CodeGen/inline-asm-matching-constraint.c
@@ -0,0 +1,11 @@
+// RUN: %clang_cc1 -emit-llvm %s -o - -triple powerpc64le-linux-gnu | FileCheck %s
+// Sadly since this requires a register constraint to trigger we have to set
+// a target here.
+void a(void) {
+ register unsigned long __sc_0 __asm__("r0");
+ __asm__ __volatile__("mfcr %0" : "=&r"(__sc_0) : "0"(__sc_0));
+}
+
+// Check that we can generate code for this correctly. The matching input
+// constraint should not have an early clobber on it.
+// CHECK: call i64 asm sideeffect "mfcr $0", "=&{r0},{r0}"(i64 %0)
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