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| author | Eli Friedman <eli.friedman@gmail.com> | 2009-08-23 00:14:19 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2009-08-23 00:14:19 +0000 |
| commit | 79ba8f2edc35a01535dcece188d5d2de65dcb144 (patch) | |
| tree | e4a8b6cf82c931db465d7dde44c9c95d34390ddf | |
| parent | d99bd52c7395d86c2981b560e3e39a92b3e023f4 (diff) | |
| download | bcm5719-llvm-79ba8f2edc35a01535dcece188d5d2de65dcb144.tar.gz bcm5719-llvm-79ba8f2edc35a01535dcece188d5d2de65dcb144.zip | |
Add check for completeness. Note that this doesn't actually have any
effect with the way the current code is structured.
llvm-svn: 79792
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4138e98f18e..301c7b35c3d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3460,7 +3460,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { unsigned EVTBits = ExtVT.getSizeInBits(); unsigned ShAmt = 0; - if (N0.getOpcode() == ISD::SRL && N0.hasOneUse()) { + if (N0.getOpcode() == ISD::SRL && N0.hasOneUse() && ExtVT.isRound()) { if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { ShAmt = N01->getZExtValue(); // Is the shift amount a multiple of size of VT? |
