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authorSanjay Patel <spatel@rotateright.com>2017-04-23 13:37:05 +0000
committerSanjay Patel <spatel@rotateright.com>2017-04-23 13:37:05 +0000
commit794c34dc35ab70b4e7839e011a787b17dca0363d (patch)
tree58725f77dd95b108f29db7f7fd484944649098e8
parent4abfb3d7414e616cd84034735893528f6ca0c35a (diff)
downloadbcm5719-llvm-794c34dc35ab70b4e7839e011a787b17dca0363d.tar.gz
bcm5719-llvm-794c34dc35ab70b4e7839e011a787b17dca0363d.zip
[InstCombine] add tests for add-to-xor commuted variants; NFC
1 out of the 4 tests commuted the operands, so there's an asymmetry somewhere under this in how we handle these transforms. llvm-svn: 301125
-rw-r--r--llvm/test/Transforms/InstCombine/and-or-not.ll52
1 files changed, 47 insertions, 5 deletions
diff --git a/llvm/test/Transforms/InstCombine/and-or-not.ll b/llvm/test/Transforms/InstCombine/and-or-not.ll
index ac3f3669674..43985945db8 100644
--- a/llvm/test/Transforms/InstCombine/and-or-not.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-not.ll
@@ -4,20 +4,62 @@
; (a | b) & ~(a & b) --> a ^ b
-define i32 @and_to_xor(i32 %a, i32 %b) {
-; CHECK-LABEL: @and_to_xor(
+define i32 @and_to_xor1(i32 %a, i32 %b) {
+; CHECK-LABEL: @and_to_xor1(
+; CHECK-NEXT: [[AND2:%.*]] = xor i32 %a, %b
+; CHECK-NEXT: ret i32 [[AND2]]
+;
+ %or = or i32 %a, %b
+ %and = and i32 %a, %b
+ %not = xor i32 %and, -1
+ %and2 = and i32 %or, %not
+ ret i32 %and2
+}
+
+; ~(a & b) & (a | b) --> a ^ b
+
+define i32 @and_to_xor2(i32 %a, i32 %b) {
+; CHECK-LABEL: @and_to_xor2(
+; CHECK-NEXT: [[AND2:%.*]] = xor i32 %a, %b
+; CHECK-NEXT: ret i32 [[AND2]]
+;
+ %or = or i32 %a, %b
+ %and = and i32 %a, %b
+ %not = xor i32 %and, -1
+ %and2 = and i32 %not, %or
+ ret i32 %and2
+}
+
+; (a | b) & ~(b & a) --> a ^ b
+
+define i32 @and_to_xor3(i32 %a, i32 %b) {
+; CHECK-LABEL: @and_to_xor3(
; CHECK-NEXT: [[AND2:%.*]] = xor i32 %b, %a
; CHECK-NEXT: ret i32 [[AND2]]
;
- %or = or i32 %b, %a
+ %or = or i32 %a, %b
%and = and i32 %b, %a
%not = xor i32 %and, -1
%and2 = and i32 %or, %not
ret i32 %and2
}
-define <4 x i32> @and_to_xor_vec(<4 x i32> %a, <4 x i32> %b) {
-; CHECK-LABEL: @and_to_xor_vec(
+; ~(a & b) & (b | a) --> a ^ b
+
+define i32 @and_to_xor4(i32 %a, i32 %b) {
+; CHECK-LABEL: @and_to_xor4(
+; CHECK-NEXT: [[AND2:%.*]] = xor i32 %a, %b
+; CHECK-NEXT: ret i32 [[AND2]]
+;
+ %or = or i32 %b, %a
+ %and = and i32 %a, %b
+ %not = xor i32 %and, -1
+ %and2 = and i32 %not, %or
+ ret i32 %and2
+}
+
+define <4 x i32> @and_to_xor1_vec(<4 x i32> %a, <4 x i32> %b) {
+; CHECK-LABEL: @and_to_xor1_vec(
; CHECK-NEXT: [[AND2:%.*]] = xor <4 x i32> %a, %b
; CHECK-NEXT: ret <4 x i32> [[AND2]]
;
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