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authorSander de Smalen <sander.desmalen@arm.com>2018-01-09 11:17:06 +0000
committerSander de Smalen <sander.desmalen@arm.com>2018-01-09 11:17:06 +0000
commit7868e740333984bd2e348d9e45c61f8ff57696a9 (patch)
treec39ba44e055ebd2333ac720b6e08310d874a65bd
parenteededdade956e057d099bea20b769d25374d89c5 (diff)
downloadbcm5719-llvm-7868e740333984bd2e348d9e45c61f8ff57696a9.tar.gz
bcm5719-llvm-7868e740333984bd2e348d9e45c61f8ff57696a9.zip
[AArch64][SVE] Asm: Add parsing of merging/zeroing suffix for SVE predicate vector operands
Summary: Parsing of the '/m' (merging) or '/z' (zeroing) suffix of a predicate operand. Patch [2/3] in a series to add predicated ADD/SUB instructions for SVE. Reviewers: rengolin, mcrosier, evandro, fhahn, echristo, MatzeB, t.p.northover Reviewed By: fhahn Subscribers: t.p.northover, MatzeB, aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D41442 llvm-svn: 322070
-rw-r--r--llvm/lib/Target/AArch64/AArch64.td2
-rw-r--r--llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp30
2 files changed, 32 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 75fb937de9b..dce71e3fafb 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -469,12 +469,14 @@ def GenericAsmParserVariant : AsmParserVariant {
int Variant = 0;
string Name = "generic";
string BreakCharacters = ".";
+ string TokenizingCharacters = "[]*!/";
}
def AppleAsmParserVariant : AsmParserVariant {
int Variant = 1;
string Name = "apple-neon";
string BreakCharacters = ".";
+ string TokenizingCharacters = "[]*!/";
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index ac9ff51f69f..89cb073d085 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2808,6 +2808,36 @@ AArch64AsmParser::tryParseSVEPredicateVector(OperandVector &Operands) {
AArch64Operand::CreateReg(RegNum, RegKind::SVEPredicateVector,
ElementWidth, S, getLoc(), getContext()));
+ // Not all predicates are followed by a '/m' or '/z'.
+ MCAsmParser &Parser = getParser();
+ if (Parser.getTok().isNot(AsmToken::Slash))
+ return MatchOperand_Success;
+
+ // But when they do they shouldn't have an element type suffix.
+ if (!Kind.empty()) {
+ Error(S, "not expecting size suffix");
+ return MatchOperand_ParseFail;
+ }
+
+ // Add a literal slash as operand
+ Operands.push_back(
+ AArch64Operand::CreateToken("/" , false, getLoc(), getContext()));
+
+ Parser.Lex(); // Eat the slash.
+
+ // Zeroing or merging?
+ StringRef Pred = Parser.getTok().getString().lower();
+ if (Pred != "z" && Pred != "m") {
+ Error(getLoc(), "expecting 'm' or 'z' predication");
+ return MatchOperand_ParseFail;
+ }
+
+ // Add zero/merge token.
+ const char *ZM = Pred == "z" ? "z" : "m";
+ Operands.push_back(
+ AArch64Operand::CreateToken(ZM, false, getLoc(), getContext()));
+
+ Parser.Lex(); // Eat zero/merge token.
return MatchOperand_Success;
}
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