X86: Don't drop half of the mask when converting 2-address shufps into 3-address pshufd.

It's debatable whether this transform is useful at all, but for now make sure
we don't generate invalid asm.

llvm-svn: 219084

2 files changed, 12 insertions, 1 deletions

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 08306419f5a..dc97185ed95 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2146,7 +2146,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
     unsigned B = MI->getOperand(1).getReg();
     unsigned C = MI->getOperand(2).getReg();
     if (B != C) return nullptr;
-    unsigned M = MI->getOperand(3).getImm();
+    int64_t M = MI->getOperand(3).getImm();
     NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
       .addOperand(Dest).addOperand(Src).addImm(M);
     break;
diff --git a/llvm/test/CodeGen/X86/3addr-shufps.ll b/llvm/test/CodeGen/X86/3addr-shufps.ll
new file mode 100644
index 00000000000..8603df9a7ab
--- /dev/null
+++ b/llvm/test/CodeGen/X86/3addr-shufps.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin13 -mcpu=pentium4 | FileCheck %s
+
+define <4 x float> @test1(<4 x i32>, <4 x float> %b) {
+  %s = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 3>
+  ret <4 x float> %s
+
+; We convert shufps -> pshufd here to save a move.
+; CHECK-LABEL: test1:
+; CHECK:         pshufd $-27, %xmm1, %xmm0
+; CHECK-NEXT:    ret
+}