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authorCraig Topper <craig.topper@intel.com>2018-03-18 22:16:53 +0000
committerCraig Topper <craig.topper@intel.com>2018-03-18 22:16:53 +0000
commit75aeb62eb423cc856481e582957b8a41d3c86bf5 (patch)
tree0c427bcbb984cd03b4b002bbcbcf8528411bb1a7
parentf7fdfb3fb6318fd032e9335a4f40275c7da1b1c2 (diff)
downloadbcm5719-llvm-75aeb62eb423cc856481e582957b8a41d3c86bf5.tar.gz
bcm5719-llvm-75aeb62eb423cc856481e582957b8a41d3c86bf5.zip
[AArch64] Fix a few InstRWs in the A53 scheduler model and enable FullInstRWOverlapCheck.
This fixes the errors found by the new check added in r327808. llvm-svn: 327812
-rw-r--r--llvm/lib/Target/AArch64/AArch64SchedA53.td11
1 files changed, 4 insertions, 7 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedA53.td b/llvm/lib/Target/AArch64/AArch64SchedA53.td
index 1838a709f24..94b90edb25b 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedA53.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedA53.td
@@ -28,9 +28,6 @@ def CortexA53Model : SchedMachineModel {
let CompleteModel = 1;
list<Predicate> UnsupportedFeatures = [HasSVE];
-
- // FIXME: Remove when all errors have been fixed.
- let FullInstRWOverlapCheck = 0;
}
@@ -225,10 +222,10 @@ def : InstRW<[A53WriteVLD1], (instregex "LD2i(8|16|32|64)$")>;
def : InstRW<[A53WriteVLD1], (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>;
def : InstRW<[A53WriteVLD2], (instregex "LD2Twov(8b|4h|2s)$")>;
def : InstRW<[A53WriteVLD4], (instregex "LD2Twov(16b|8h|4s|2d)$")>;
-def : InstRW<[A53WriteVLD1, WriteAdr], (instregex "LD2i(8|16|32|64)(_POST)?$")>;
-def : InstRW<[A53WriteVLD1, WriteAdr], (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)(_POST)?$")>;
-def : InstRW<[A53WriteVLD2, WriteAdr], (instregex "LD2Twov(8b|4h|2s)(_POST)?$")>;
-def : InstRW<[A53WriteVLD4, WriteAdr], (instregex "LD2Twov(16b|8h|4s|2d)(_POST)?$")>;
+def : InstRW<[A53WriteVLD1, WriteAdr], (instregex "LD2i(8|16|32|64)_POST$")>;
+def : InstRW<[A53WriteVLD1, WriteAdr], (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>;
+def : InstRW<[A53WriteVLD2, WriteAdr], (instregex "LD2Twov(8b|4h|2s)_POST$")>;
+def : InstRW<[A53WriteVLD4, WriteAdr], (instregex "LD2Twov(16b|8h|4s|2d)_POST$")>;
def : InstRW<[A53WriteVLD2], (instregex "LD3i(8|16|32|64)$")>;
def : InstRW<[A53WriteVLD2], (instregex "LD3Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>;
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