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authorJF Bastien <jfb@google.com>2015-09-08 17:21:21 +0000
committerJF Bastien <jfb@google.com>2015-09-08 17:21:21 +0000
commit749ed88aa5601118173aa0e478c46a9400ad700f (patch)
treefd00c26ee3236af8fff23730be98c0588a744fdb
parent25425ad9207f3caa2dc466c5be9ee0df8dfac05b (diff)
downloadbcm5719-llvm-749ed88aa5601118173aa0e478c46a9400ad700f.tar.gz
bcm5719-llvm-749ed88aa5601118173aa0e478c46a9400ad700f.zip
WebAssembly: NFC rename shr/sar
Renamed from: https://github.com/WebAssembly/design/pull/332 llvm-svn: 247028
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td4
-rw-r--r--llvm/test/CodeGen/WebAssembly/integer32.ll4
-rw-r--r--llvm/test/CodeGen/WebAssembly/integer64.ll4
-rw-r--r--llvm/test/CodeGen/WebAssembly/load-store-i1.ll4
4 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
index 16ed7acbb9d..16a21082bd3 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
@@ -23,8 +23,8 @@ defm AND : BinaryInt<and>;
defm IOR : BinaryInt<or>;
defm XOR : BinaryInt<xor>;
defm SHL : BinaryInt<shl>;
-defm SHR : BinaryInt<srl>;
-defm SAR : BinaryInt<sra>;
+defm SHR_U : BinaryInt<srl>;
+defm SHR_S : BinaryInt<sra>;
defm EQ : ComparisonInt<SETEQ>;
defm NE : ComparisonInt<SETNE>;
diff --git a/llvm/test/CodeGen/WebAssembly/integer32.ll b/llvm/test/CodeGen/WebAssembly/integer32.ll
index 5051d0db30e..78cf9642448 100644
--- a/llvm/test/CodeGen/WebAssembly/integer32.ll
+++ b/llvm/test/CodeGen/WebAssembly/integer32.ll
@@ -134,7 +134,7 @@ define i32 @shl32(i32 %x, i32 %y) {
; CHECK-NEXT: (param i32) (param i32) (result i32)
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (shr @1 @0))
+; CHECK-NEXT: (setlocal @2 (shr_u @1 @0))
; CHECK-NEXT: (return @2)
define i32 @shr32(i32 %x, i32 %y) {
%a = lshr i32 %x, %y
@@ -145,7 +145,7 @@ define i32 @shr32(i32 %x, i32 %y) {
; CHECK-NEXT: (param i32) (param i32) (result i32)
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (sar @1 @0))
+; CHECK-NEXT: (setlocal @2 (shr_s @1 @0))
; CHECK-NEXT: (return @2)
define i32 @sar32(i32 %x, i32 %y) {
%a = ashr i32 %x, %y
diff --git a/llvm/test/CodeGen/WebAssembly/integer64.ll b/llvm/test/CodeGen/WebAssembly/integer64.ll
index ee971082c13..b1c99c54f61 100644
--- a/llvm/test/CodeGen/WebAssembly/integer64.ll
+++ b/llvm/test/CodeGen/WebAssembly/integer64.ll
@@ -134,7 +134,7 @@ define i64 @shl64(i64 %x, i64 %y) {
; CHECK-NEXT: (param i64) (param i64) (result i64)
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (shr @1 @0))
+; CHECK-NEXT: (setlocal @2 (shr_u @1 @0))
; CHECK-NEXT: (return @2)
define i64 @shr64(i64 %x, i64 %y) {
%a = lshr i64 %x, %y
@@ -145,7 +145,7 @@ define i64 @shr64(i64 %x, i64 %y) {
; CHECK-NEXT: (param i64) (param i64) (result i64)
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (sar @1 @0))
+; CHECK-NEXT: (setlocal @2 (shr_s @1 @0))
; CHECK-NEXT: (return @2)
define i64 @sar64(i64 %x, i64 %y) {
%a = ashr i64 %x, %y
diff --git a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
index 99b689e0cb2..5ba6361bd0c 100644
--- a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll
@@ -18,7 +18,7 @@ define i32 @load_unsigned_i1_i32(i1* %p) {
; CHECK: (setlocal @1 (load_zx_i8_i32 @0))
; CHECK-NEXT: (setlocal @2 (immediate 31))
; CHECK-NEXT: (setlocal @3 (shl @1 @2))
-; CHECK-NEXT: (setlocal @4 (sar @3 @2))
+; CHECK-NEXT: (setlocal @4 (shr_s @3 @2))
; CHECK-NEXT: (return @4)
define i32 @load_signed_i1_i32(i1* %p) {
%v = load i1, i1* %p
@@ -39,7 +39,7 @@ define i64 @load_unsigned_i1_i64(i1* %p) {
; CHECK: (setlocal @1 (load_zx_i8_i64 @0))
; CHECK-NEXT: (setlocal @2 (immediate 63))
; CHECK-NEXT: (setlocal @3 (shl @1 @2))
-; CHECK-NEXT: (setlocal @4 (sar @3 @2))
+; CHECK-NEXT: (setlocal @4 (shr_s @3 @2))
; CHECK-NEXT: (return @4)
define i64 @load_signed_i1_i64(i1* %p) {
%v = load i1, i1* %p
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