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authorChangpeng Fang <changpeng.fang@gmail.com>2019-05-08 19:46:04 +0000
committerChangpeng Fang <changpeng.fang@gmail.com>2019-05-08 19:46:04 +0000
commit73b7272e7a87be08e4f5775dbd163685d57558a1 (patch)
treeb585d69dbca50914332e0ac7d86689f20a68ec4e
parentc5db081f8d5d1003bae51d242cbcbfa057cef6ec (diff)
downloadbcm5719-llvm-73b7272e7a87be08e4f5775dbd163685d57558a1.tar.gz
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AMDGPU: Fix a mis-placed bracket
Differential Revision: https://reviews.llvm.org/D61430 llvm-svn: 360283
-rw-r--r--llvm/lib/Target/AMDGPU/VOP2Instructions.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index f7e51cfa913..b7c2999a7c7 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -531,10 +531,10 @@ let SubtargetPredicate = HasAddNoCarryInsts in {
let SubtargetPredicate = isGFX6GFX7GFX8GFX9, Predicates = [isGFX6GFX7GFX8GFX9] in {
def : DivergentBinOp<add, V_ADD_I32_e32>;
def : DivergentClampingBinOp<sub, V_SUB_I32_e64>;
+}
def : DivergentBinOp<adde, V_ADDC_U32_e32>;
def : DivergentBinOp<sube, V_SUBB_U32_e32>;
-}
class divergent_i64_BinOp <SDPatternOperator Op, Instruction Inst> :
GCNPat<
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