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authorHal Finkel <hfinkel@anl.gov>2014-03-26 19:13:54 +0000
committerHal Finkel <hfinkel@anl.gov>2014-03-26 19:13:54 +0000
commit7279f4b00d06238fa2faa378a526eae4704560c0 (patch)
tree50c612451294aab97293732957f1ab11748fb4cf
parent6fc2ec96b83925dc9cf87100aed179d7548792fe (diff)
downloadbcm5719-llvm-7279f4b00d06238fa2faa378a526eae4704560c0.tar.gz
bcm5719-llvm-7279f4b00d06238fa2faa378a526eae4704560c0.zip
[PowerPC] Use v2f64 <-> v2i64 VSX conversion instructions
llvm-svn: 204843
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp5
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrVSX.td12
-rw-r--r--llvm/test/CodeGen/PowerPC/vsx.ll72
3 files changed, 85 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 0aa76774c6d..e09725d59d2 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -584,6 +584,11 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::STORE, MVT::v2i64, Promote);
AddPromotedToType (ISD::STORE, MVT::v2i64, MVT::v2f64);
+ setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal);
+ setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
+ setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal);
+ setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal);
+
addRegisterClass(MVT::v2i64, &PPC::VSRCRegClass);
}
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index bc0d180998d..8410912c20a 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -512,13 +512,15 @@ let Uses = [RM] in {
"xvcvdpsp $XT, $XB", IIC_VecFP, []>;
def XVCVDPSXDS : XX2Form<60, 472,
(outs vsrc:$XT), (ins vsrc:$XB),
- "xvcvdpsxds $XT, $XB", IIC_VecFP, []>;
+ "xvcvdpsxds $XT, $XB", IIC_VecFP,
+ [(set v2i64:$XT, (fp_to_sint v2f64:$XB))]>;
def XVCVDPSXWS : XX2Form<60, 216,
(outs vsrc:$XT), (ins vsrc:$XB),
"xvcvdpsxws $XT, $XB", IIC_VecFP, []>;
def XVCVDPUXDS : XX2Form<60, 456,
(outs vsrc:$XT), (ins vsrc:$XB),
- "xvcvdpuxds $XT, $XB", IIC_VecFP, []>;
+ "xvcvdpuxds $XT, $XB", IIC_VecFP,
+ [(set v2i64:$XT, (fp_to_uint v2f64:$XB))]>;
def XVCVDPUXWS : XX2Form<60, 200,
(outs vsrc:$XT), (ins vsrc:$XB),
"xvcvdpuxws $XT, $XB", IIC_VecFP, []>;
@@ -540,7 +542,8 @@ let Uses = [RM] in {
"xvcvspuxws $XT, $XB", IIC_VecFP, []>;
def XVCVSXDDP : XX2Form<60, 504,
(outs vsrc:$XT), (ins vsrc:$XB),
- "xvcvsxddp $XT, $XB", IIC_VecFP, []>;
+ "xvcvsxddp $XT, $XB", IIC_VecFP,
+ [(set v2f64:$XT, (sint_to_fp v2i64:$XB))]>;
def XVCVSXDSP : XX2Form<60, 440,
(outs vsrc:$XT), (ins vsrc:$XB),
"xvcvsxdsp $XT, $XB", IIC_VecFP, []>;
@@ -552,7 +555,8 @@ let Uses = [RM] in {
"xvcvsxwsp $XT, $XB", IIC_VecFP, []>;
def XVCVUXDDP : XX2Form<60, 488,
(outs vsrc:$XT), (ins vsrc:$XB),
- "xvcvuxddp $XT, $XB", IIC_VecFP, []>;
+ "xvcvuxddp $XT, $XB", IIC_VecFP,
+ [(set v2f64:$XT, (uint_to_fp v2i64:$XB))]>;
def XVCVUXDSP : XX2Form<60, 424,
(outs vsrc:$XT), (ins vsrc:$XB),
"xvcvuxdsp $XT, $XB", IIC_VecFP, []>;
diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll
index 7014849a758..d2f8bb8ee55 100644
--- a/llvm/test/CodeGen/PowerPC/vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx.ll
@@ -332,3 +332,75 @@ define void @test31(<2 x i64>* %a, <2 x i64> %b) {
; CHECK: blr
}
+define <2 x double> @test40(<2 x i64> %a) {
+ %v = uitofp <2 x i64> %a to <2 x double>
+ ret <2 x double> %v
+
+; CHECK-LABEL: @test40
+; CHECK: xvcvuxddp 34, 34
+; CHECK: blr
+}
+
+define <2 x double> @test41(<2 x i64> %a) {
+ %v = sitofp <2 x i64> %a to <2 x double>
+ ret <2 x double> %v
+
+; CHECK-LABEL: @test41
+; CHECK: xvcvsxddp 34, 34
+; CHECK: blr
+}
+
+define <2 x i64> @test42(<2 x double> %a) {
+ %v = fptoui <2 x double> %a to <2 x i64>
+ ret <2 x i64> %v
+
+; CHECK-LABEL: @test42
+; CHECK: xvcvdpuxds 34, 34
+; CHECK: blr
+}
+
+define <2 x i64> @test43(<2 x double> %a) {
+ %v = fptosi <2 x double> %a to <2 x i64>
+ ret <2 x i64> %v
+
+; CHECK-LABEL: @test43
+; CHECK: xvcvdpsxds 34, 34
+; CHECK: blr
+}
+
+define <2 x float> @test44(<2 x i64> %a) {
+ %v = uitofp <2 x i64> %a to <2 x float>
+ ret <2 x float> %v
+
+; CHECK-LABEL: @test44
+; FIXME: The code quality here looks pretty bad.
+; CHECK: blr
+}
+
+define <2 x float> @test45(<2 x i64> %a) {
+ %v = sitofp <2 x i64> %a to <2 x float>
+ ret <2 x float> %v
+
+; CHECK-LABEL: @test45
+; FIXME: The code quality here looks pretty bad.
+; CHECK: blr
+}
+
+define <2 x i64> @test46(<2 x float> %a) {
+ %v = fptoui <2 x float> %a to <2 x i64>
+ ret <2 x i64> %v
+
+; CHECK-LABEL: @test46
+; FIXME: The code quality here looks pretty bad.
+; CHECK: blr
+}
+
+define <2 x i64> @test47(<2 x float> %a) {
+ %v = fptosi <2 x float> %a to <2 x i64>
+ ret <2 x i64> %v
+
+; CHECK-LABEL: @test47
+; FIXME: The code quality here looks pretty bad.
+; CHECK: blr
+}
+
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