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| author | Amaury Sechet <deadalnix@gmail.com> | 2017-03-01 23:44:17 +0000 |
|---|---|---|
| committer | Amaury Sechet <deadalnix@gmail.com> | 2017-03-01 23:44:17 +0000 |
| commit | 71f511fd1ec9ad96dd048b438ef8cf3546bccab1 (patch) | |
| tree | 839dbd4931b51bfd4097a9236ab04a711b698b5a | |
| parent | 120ae22d703834d453cb0a775b24daf46d5d5eeb (diff) | |
| download | bcm5719-llvm-71f511fd1ec9ad96dd048b438ef8cf3546bccab1.tar.gz bcm5719-llvm-71f511fd1ec9ad96dd048b438ef8cf3546bccab1.zip | |
[DAGCombiner] mulhi + 1 never overflow.
Summary:
This can be used to optimize large multiplications after legalization.
Depends on D29565
Reviewers: mkuper, spatel, RKSimon, zvi, bkramer, aaboud, craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29587
llvm-svn: 296711
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 13 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/overflow.ll | 6 |
2 files changed, 15 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 16425a08200..5d7bf27ae64 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2775,6 +2775,19 @@ SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0, return OFK_Never; } + // mulhi + 1 never overflow + if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 && + (~N1Zero & 0x01) == ~N1Zero) + return OFK_Never; + + if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) { + APInt N0Zero, N0One; + computeKnownBits(N0, N0Zero, N0One); + + if ((~N0Zero & 0x01) == ~N0Zero) + return OFK_Never; + } + return OFK_Sometime; } diff --git a/llvm/test/CodeGen/X86/overflow.ll b/llvm/test/CodeGen/X86/overflow.ll index 37ca5e1c0eb..ff25b5de493 100644 --- a/llvm/test/CodeGen/X86/overflow.ll +++ b/llvm/test/CodeGen/X86/overflow.ll @@ -50,10 +50,8 @@ define i128 @mulhioverflow(i64 %a, i64 %b, i64 %c) nounwind { ; X64-NEXT: movq %rdi, %rax ; X64-NEXT: mulq %rsi ; X64-NEXT: andl $1, %ecx -; X64-NEXT: addq %rdx, %rcx -; X64-NEXT: sbbq %rdx, %rdx -; X64-NEXT: andl $1, %edx -; X64-NEXT: movq %rcx, %rax +; X64-NEXT: leaq (%rcx,%rdx), %rax +; X64-NEXT: xorl %edx, %edx ; X64-NEXT: retq %1 = zext i64 %a to i128 %2 = zext i64 %b to i128 |

