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| author | Dan Gohman <gohman@apple.com> | 2007-10-08 17:28:24 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-10-08 17:28:24 +0000 |
| commit | 71f0d7d76e5b7ec8f76ab50a967574ce9a46dfae (patch) | |
| tree | 76d3d768157fd5e7b700fc8b7caf55470f290403 | |
| parent | 4b2113c281899df03a55ecbcfb7ccb37693fdf4c (diff) | |
| download | bcm5719-llvm-71f0d7d76e5b7ec8f76ab50a967574ce9a46dfae.tar.gz bcm5719-llvm-71f0d7d76e5b7ec8f76ab50a967574ce9a46dfae.zip | |
When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
target-indepenent lowering, don't use them on PowerPC.
llvm-svn: 42755
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index ae29095dd8f..20ec3c37304 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -87,6 +87,16 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::SREM, MVT::i64, Expand); setOperationAction(ISD::UREM, MVT::i64, Expand); + + // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. + setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); + setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); + setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); + setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); + setOperationAction(ISD::UDIVREM, MVT::i32, Expand); + setOperationAction(ISD::SDIVREM, MVT::i32, Expand); + setOperationAction(ISD::UDIVREM, MVT::i64, Expand); + setOperationAction(ISD::SDIVREM, MVT::i64, Expand); // We don't support sin/cos/sqrt/fmod setOperationAction(ISD::FSIN , MVT::f64, Expand); @@ -265,6 +275,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand); setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand); setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::UMUL_LOHI, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::SMUL_LOHI, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::UDIVREM, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::SDIVREM, (MVT::ValueType)VT, Expand); setOperationAction(ISD::SCALAR_TO_VECTOR, (MVT::ValueType)VT, Expand); } |
