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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-11-30 13:15:21 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-11-30 13:15:21 +0000 |
commit | 7153414768837e98cc2a3d8990c9bac06a8bae41 (patch) | |
tree | 7551cb6dd83aa862444b7556acb0c02736655d91 | |
parent | 5b6234dc4a19e72368671430e71190b175aabcdd (diff) | |
download | bcm5719-llvm-7153414768837e98cc2a3d8990c9bac06a8bae41.tar.gz bcm5719-llvm-7153414768837e98cc2a3d8990c9bac06a8bae41.zip |
[mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.
llvm-svn: 195972
-rw-r--r-- | llvm/lib/Target/Mips/MipsSERegisterInfo.cpp | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp index 286a2e2a4d9..2be054eef5e 100644 --- a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp +++ b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp @@ -113,21 +113,23 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II, // If MI is not a debug value, make sure Offset fits in the 16-bit immediate // field. - if (!MI.isDebugValue() && !isInt<16>(Offset)) { - MachineBasicBlock &MBB = *MI.getParent(); - DebugLoc DL = II->getDebugLoc(); - unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu; - unsigned NewImm; - const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo*>( - MBB.getParent()->getTarget().getInstrInfo()); - unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm); - BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg) - .addReg(Reg, RegState::Kill); - - FrameReg = Reg; - Offset = SignExtend64<16>(NewImm); - IsKill = true; + if (!MI.isDebugValue()) { + if (!isInt<16>(Offset)) { + MachineBasicBlock &MBB = *MI.getParent(); + DebugLoc DL = II->getDebugLoc(); + unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu; + unsigned NewImm; + const MipsSEInstrInfo &TII = + *static_cast<const MipsSEInstrInfo *>( + MBB.getParent()->getTarget().getInstrInfo()); + unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm); + BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg) + .addReg(Reg, RegState::Kill); + + FrameReg = Reg; + Offset = SignExtend64<16>(NewImm); + IsKill = true; + } } MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); |