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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2017-03-07 20:53:00 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2017-03-07 20:53:00 +0000 |
| commit | 70dd6c2212232ce8417d2d4dc53775c843dcca8b (patch) | |
| tree | 10ce3de3992a095ea83ff1ca3f1cb8c38f199b8d | |
| parent | adce3ee2190b279e32785548128962e90cffd44b (diff) | |
| download | bcm5719-llvm-70dd6c2212232ce8417d2d4dc53775c843dcca8b.tar.gz bcm5719-llvm-70dd6c2212232ce8417d2d4dc53775c843dcca8b.zip | |
[GlobalISel] Add vector select translation test. NFC.
llvm-svn: 297206
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 7539ceef451..17ed0169c98 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -945,6 +945,19 @@ define i8* @test_select_ptr(i1 %tst, i8* %lhs, i8* %rhs) { ret i8* %res } +; CHECK-LABEL: name: test_vselect_vec +; CHECK: [[TST32:%[0-9]+]](<4 x s32>) = COPY %q0 +; CHECK: [[LHS:%[0-9]+]](<4 x s32>) = COPY %q1 +; CHECK: [[RHS:%[0-9]+]](<4 x s32>) = COPY %q2 +; CHECK: [[TST:%[0-9]+]](<4 x s1>) = G_TRUNC [[TST32]](<4 x s32>) +; CHECK: [[RES:%[0-9]+]](<4 x s32>) = G_SELECT [[TST]](<4 x s1>), [[LHS]], [[RHS]] +; CHECK: %q0 = COPY [[RES]] +define <4 x i32> @test_vselect_vec(<4 x i32> %tst32, <4 x i32> %lhs, <4 x i32> %rhs) { + %tst = trunc <4 x i32> %tst32 to <4 x i1> + %res = select <4 x i1> %tst, <4 x i32> %lhs, <4 x i32> %rhs + ret <4 x i32> %res +} + ; CHECK-LABEL: name: test_fptosi ; CHECK: [[FPADDR:%[0-9]+]](p0) = COPY %x0 ; CHECK: [[FP:%[0-9]+]](s32) = G_LOAD [[FPADDR]](p0) |
