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| author | Dylan McKay <me@dylanmckay.io> | 2018-11-09 23:17:59 +0000 |
|---|---|---|
| committer | Dylan McKay <me@dylanmckay.io> | 2018-11-09 23:17:59 +0000 |
| commit | 6fddb536853c6485bf8dcbc9dd5d04cf9045cc6d (patch) | |
| tree | df399bc8102c47682ea6497533e2317ff37cdb56 | |
| parent | f2e65f863617d1e0cd5aa6e10718272999a28836 (diff) | |
| download | bcm5719-llvm-6fddb536853c6485bf8dcbc9dd5d04cf9045cc6d.tar.gz bcm5719-llvm-6fddb536853c6485bf8dcbc9dd5d04cf9045cc6d.zip | |
[AVR] Reorder the CHECK lines in directmem.ll to match current trunk
In r346432 ("[DAGCombine] Improve alias analysis for chain of independent stores"),
the order of ldi/sts blocks changed.
The new IR is equivalent to the old IR.
This patch updates the test to fix the test suite.
llvm-svn: 346565
| -rw-r--r-- | llvm/test/CodeGen/AVR/directmem.ll | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/AVR/directmem.ll b/llvm/test/CodeGen/AVR/directmem.ll index d0674cbc459..6d2ddc536d2 100644 --- a/llvm/test/CodeGen/AVR/directmem.ll +++ b/llvm/test/CodeGen/AVR/directmem.ll @@ -84,6 +84,11 @@ define i16 @global16_load() { define void @array16_store() { ; CHECK-LABEL: array16_store: +; CHECK: ldi [[REG1:r[0-9]+]], 221 +; CHECK: ldi [[REG2:r[0-9]+]], 170 +; CHECK: sts int.array+5, [[REG2]] +; CHECK: sts int.array+4, [[REG1]] + ; CHECK: ldi [[REG1:r[0-9]+]], 204 ; CHECK: ldi [[REG2:r[0-9]+]], 170 ; CHECK: sts int.array+3, [[REG2]] @@ -93,12 +98,6 @@ define void @array16_store() { ; CHECK: ldi [[REG2:r[0-9]+]], 170 ; CHECK: sts int.array+1, [[REG2]] ; CHECK: sts int.array, [[REG1]] - - -; CHECK: ldi [[REG1:r[0-9]+]], 221 -; CHECK: ldi [[REG2:r[0-9]+]], 170 -; CHECK: sts int.array+5, [[REG2]] -; CHECK: sts int.array+4, [[REG1]] store i16 43707, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 0) store i16 43724, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 1) store i16 43741, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 2) @@ -152,30 +151,36 @@ define i32 @global32_load() { define void @array32_store() { ; CHECK-LABEL: array32_store: + +; CHECK: ldi [[REG1:r[0-9]+]], 170 +; CHECK: ldi [[REG2:r[0-9]+]], 153 +; CHECK: sts long.array+11, [[REG2]] +; CHECK: sts long.array+10, [[REG1]] + +; CHECK: ldi [[REG1:r[0-9]+]], 204 +; CHECK: ldi [[REG2:r[0-9]+]], 187 +; CHECK: sts long.array+9, [[REG2]] +; CHECK: sts long.array+8, [[REG1]] + ; CHECK: ldi [[REG1:r[0-9]+]], 102 ; CHECK: ldi [[REG2:r[0-9]+]], 85 ; CHECK: sts long.array+7, [[REG2]] ; CHECK: sts long.array+6, [[REG1]] + ; CHECK: ldi [[REG1:r[0-9]+]], 136 ; CHECK: ldi [[REG2:r[0-9]+]], 119 ; CHECK: sts long.array+5, [[REG2]] ; CHECK: sts long.array+4, [[REG1]] + ; CHECK: ldi [[REG1:r[0-9]+]], 27 ; CHECK: ldi [[REG2:r[0-9]+]], 172 ; CHECK: sts long.array+3, [[REG2]] ; CHECK: sts long.array+2, [[REG1]] + ; CHECK: ldi [[REG1:r[0-9]+]], 68 ; CHECK: ldi [[REG2:r[0-9]+]], 13 ; CHECK: sts long.array+1, [[REG2]] ; CHECK: sts long.array, [[REG1]] -; CHECK: ldi [[REG1:r[0-9]+]], 170 -; CHECK: ldi [[REG2:r[0-9]+]], 153 -; CHECK: sts long.array+11, [[REG2]] -; CHECK: sts long.array+10, [[REG1]] -; CHECK: ldi [[REG1:r[0-9]+]], 204 -; CHECK: ldi [[REG2:r[0-9]+]], 187 -; CHECK: sts long.array+9, [[REG2]] -; CHECK: sts long.array+8, [[REG1]] store i32 2887454020, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 0) store i32 1432778632, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 1) store i32 2578103244, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 2) |
