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| author | Bhushan D. Attarde <Bhushan.Attarde@imgtec.com> | 2016-01-06 12:08:22 +0000 |
|---|---|---|
| committer | Bhushan D. Attarde <Bhushan.Attarde@imgtec.com> | 2016-01-06 12:08:22 +0000 |
| commit | 6fd916cd0c26da0f1371eeda51868cea480870c2 (patch) | |
| tree | b28522a8c208189f5201b50b0f657a6da2dd3960 | |
| parent | e5c9808efd33e134118be701c2f78665fc4517d4 (diff) | |
| download | bcm5719-llvm-6fd916cd0c26da0f1371eeda51868cea480870c2.tar.gz bcm5719-llvm-6fd916cd0c26da0f1371eeda51868cea480870c2.zip | |
Fix build warnings after rL256915
llvm-svn: 256929
| -rw-r--r-- | lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp index 43d4d9b6b4f..a71fca7c5c3 100644 --- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp +++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp @@ -1404,7 +1404,7 @@ EmulateInstructionMIPS::Emulate_BXX_3ops (llvm::MCInst& insn) { bool success = false; uint32_t rs, rt; - int32_t offset, pc, target, rs_val, rt_val; + int32_t offset, pc, target = 0, rs_val, rt_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); rs = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); @@ -1459,7 +1459,7 @@ EmulateInstructionMIPS::Emulate_BXX_3ops_C (llvm::MCInst& insn) { bool success = false; uint32_t rs, rt; - int32_t offset, pc, target, rs_val, rt_val; + int32_t offset, pc, target = 0, rs_val, rt_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize(); @@ -1555,7 +1555,7 @@ EmulateInstructionMIPS::Emulate_Bcond_Link_C (llvm::MCInst& insn) { bool success = false; uint32_t rs; - int32_t offset, pc, target; + int32_t offset, pc, target = 0; int32_t rs_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); @@ -1634,7 +1634,7 @@ EmulateInstructionMIPS::Emulate_Bcond_Link (llvm::MCInst& insn) { bool success = false; uint32_t rs; - int32_t offset, pc, target; + int32_t offset, pc, target = 0; int32_t rs_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); @@ -1687,7 +1687,7 @@ EmulateInstructionMIPS::Emulate_BXX_2ops (llvm::MCInst& insn) { bool success = false; uint32_t rs; - int32_t offset, pc, target; + int32_t offset, pc, target = 0; int32_t rs_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); @@ -1754,7 +1754,7 @@ EmulateInstructionMIPS::Emulate_BXX_2ops_C (llvm::MCInst& insn) { bool success = false; uint32_t rs; - int32_t offset, pc, target; + int32_t offset, pc, target = 0; int32_t rs_val; const char *op_name = m_insn_info->getName (insn.getOpcode ()); uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize(); @@ -2363,7 +2363,7 @@ EmulateInstructionMIPS::Emulate_FP_branch (llvm::MCInst& insn) { bool success = false; uint32_t cc, fcsr; - int32_t target, pc, offset; + int32_t pc, offset, target = 0; const char *op_name = m_insn_info->getName (insn.getOpcode ()); cc = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); @@ -2492,7 +2492,7 @@ EmulateInstructionMIPS::Emulate_3D_branch (llvm::MCInst& insn) { bool success = false; uint32_t cc, fcsr; - int32_t target, pc, offset; + int32_t pc, offset, target = 0; const char *op_name = m_insn_info->getName (insn.getOpcode ()); cc = m_reg_info->getEncodingValue (insn.getOperand(0).getReg()); |
