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authorEric Christopher <echristo@apple.com>2010-09-28 00:35:09 +0000
committerEric Christopher <echristo@apple.com>2010-09-28 00:35:09 +0000
commit6f98bfd870d3fedcc67b3467af2a283beff1ab3a (patch)
tree309f9a8549ca7c58e4dae97cec66e9c761067423
parent1f93ffb3e68136759e7eb141c5d753335a0c234a (diff)
downloadbcm5719-llvm-6f98bfd870d3fedcc67b3467af2a283beff1ab3a.tar.gz
bcm5719-llvm-6f98bfd870d3fedcc67b3467af2a283beff1ab3a.zip
Fix fp constant loads to have a destination register.
llvm-svn: 114930
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index e84989c10bb..eb27fad5c35 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) {
unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
// The extra reg is for addrmode5.
- AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc))
- .addReg(DestReg).addConstantPoolIndex(Idx)
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
+ DestReg)
+ .addConstantPoolIndex(Idx)
.addReg(0));
return DestReg;
}
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