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| author | Marek Olsak <marek.olsak@amd.com> | 2015-10-29 15:29:09 +0000 |
|---|---|---|
| committer | Marek Olsak <marek.olsak@amd.com> | 2015-10-29 15:29:09 +0000 |
| commit | 6f6d318e16642c1860f3693cd2a7e82133fe2746 (patch) | |
| tree | 7d79b9d7fe82e818df4976de0d32c24320884bcf | |
| parent | 74d084f466c3d9824dcd51b9b865b5721504bca6 (diff) | |
| download | bcm5719-llvm-6f6d318e16642c1860f3693cd2a7e82133fe2746.tar.gz bcm5719-llvm-6f6d318e16642c1860f3693cd2a7e82133fe2746.zip | |
AMDGPU/SI: handle undef for llvm.SI.packf16
llvm-svn: 251632
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.SI.packf16.ll | 29 |
2 files changed, 33 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index c9bc352703c..3cddafc465d 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -1091,6 +1091,10 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, DAG.getConstant(2, DL, MVT::i32), // P0 Op.getOperand(1), Op.getOperand(2), Glue); } + case AMDGPUIntrinsic::SI_packf16: + if (Op.getOperand(1).isUndef() && Op.getOperand(2).isUndef()) + return DAG.getUNDEF(MVT::i32); + return Op; case AMDGPUIntrinsic::SI_fs_interp: { SDValue IJ = Op.getOperand(4); SDValue I = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, IJ, diff --git a/llvm/test/CodeGen/AMDGPU/llvm.SI.packf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.SI.packf16.ll new file mode 100644 index 00000000000..0155757632d --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/llvm.SI.packf16.ll @@ -0,0 +1,29 @@ +; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +; GCN-LABEL: {{^}}main: +; GCN: v_cvt_pkrtz_f16_f32 +; GCN: v_cvt_pkrtz_f16_f32 +; GCN-NOT: v_cvt_pkrtz_f16_f32 + +define void @main(float %src) #0 { +main_body: + %p1 = call i32 @llvm.SI.packf16(float undef, float %src) + %p2 = call i32 @llvm.SI.packf16(float %src, float undef) + %p3 = call i32 @llvm.SI.packf16(float undef, float undef) + %f1 = bitcast i32 %p1 to float + %f2 = bitcast i32 %p2 to float + %f3 = bitcast i32 %p3 to float + call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f1, float undef, float %f1) + call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f2, float undef, float %f2) + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float undef, float %f3, float undef, float %f2) + ret void +} + +; Function Attrs: nounwind readnone +declare i32 @llvm.SI.packf16(float, float) #1 + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) + +attributes #0 = { "ShaderType"="0" } +attributes #1 = { nounwind readnone } |
