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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-24 19:00:56 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-24 19:00:56 +0000
commit6f53b38fd405dca1fb25df8fce7e3028598f3437 (patch)
tree9fd7a21d36105dd7d710a1a07603d2c30f3eb558
parentc8dba682bba9c80654d7a10331f718da9b7b0475 (diff)
downloadbcm5719-llvm-6f53b38fd405dca1fb25df8fce7e3028598f3437.tar.gz
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[TargetLowering] Add SimplifyDemandedBitsForTargetNode callback
Add a SimplifyDemandedBitsForTargetNode callback to handle target nodes. Differential Revision: https://reviews.llvm.org/D53643 llvm-svn: 345179
-rw-r--r--llvm/include/llvm/CodeGen/TargetLowering.h13
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp24
2 files changed, 36 insertions, 1 deletions
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 585d07cf044..4b1fae89be5 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -2916,11 +2916,22 @@ public:
/// elements, returning true on success. Otherwise, analyze the expression and
/// return a mask of KnownUndef and KnownZero elements for the expression
/// (used to simplify the caller). The KnownUndef/Zero elements may only be
- /// accurate for those bits in the DemandedMask
+ /// accurate for those bits in the DemandedMask.
virtual bool SimplifyDemandedVectorEltsForTargetNode(
SDValue Op, const APInt &DemandedElts, APInt &KnownUndef,
APInt &KnownZero, TargetLoweringOpt &TLO, unsigned Depth = 0) const;
+ /// Attempt to simplify any target nodes based on the demanded bits,
+ /// returning true on success. Otherwise, analyze the
+ /// expression and return a mask of KnownOne and KnownZero bits for the
+ /// expression (used to simplify the caller). The KnownZero/One bits may only
+ /// be accurate for those bits in the DemandedMask.
+ virtual bool SimplifyDemandedBitsForTargetNode(SDValue Op,
+ const APInt &DemandedBits,
+ KnownBits &Known,
+ TargetLoweringOpt &TLO,
+ unsigned Depth = 0) const;
+
/// If \p SNaN is false, \returns true if \p Op is known to never be any
/// NaN. If \p sNaN is true, returns if \p Op is known to never be a signaling
/// NaN.
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 017db41fa9e..0189a11fa1d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1335,6 +1335,13 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
LLVM_FALLTHROUGH;
}
default:
+ if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
+ if (SimplifyDemandedBitsForTargetNode(Op, DemandedBits, Known, TLO,
+ Depth))
+ return true;
+ break;
+ }
+
// Just use computeKnownBits to compute output bits.
TLO.DAG.computeKnownBits(Op, Known, Depth);
break;
@@ -1803,6 +1810,23 @@ bool TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
return false;
}
+bool TargetLowering::SimplifyDemandedBitsForTargetNode(
+ SDValue Op, const APInt &DemandedBits, KnownBits &Known,
+ TargetLoweringOpt &TLO, unsigned Depth) const {
+ assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
+ Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
+ Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
+ Op.getOpcode() == ISD::INTRINSIC_VOID) &&
+ "Should use SimplifyDemandedBits if you don't know whether Op"
+ " is a target node!");
+ EVT VT = Op.getValueType();
+ APInt DemandedElts = VT.isVector()
+ ? APInt::getAllOnesValue(VT.getVectorNumElements())
+ : APInt(1, 1);
+ computeKnownBitsForTargetNode(Op, Known, DemandedElts, TLO.DAG, Depth);
+ return false;
+}
+
bool TargetLowering::isKnownNeverNaNForTargetNode(SDValue Op,
const SelectionDAG &DAG,
bool SNaN,
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