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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-15 19:29:45 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-15 19:29:45 +0000 |
| commit | 6efa7b98523e226e5457885adae66ebb61573fdf (patch) | |
| tree | 62a5661752502d74b18caf76fe35cd6b30e17bb4 | |
| parent | 197a895e75ad464411fde5b3310d41393c872c7b (diff) | |
| download | bcm5719-llvm-6efa7b98523e226e5457885adae66ebb61573fdf.tar.gz bcm5719-llvm-6efa7b98523e226e5457885adae66ebb61573fdf.zip | |
Thumb2 assembly parsing for mul.w in IT block fix.
When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.
rdar://10449281
llvm-svn: 144679
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/basic-thumb2-instructions.s | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 1d66d125a0e..fda1c88e72e 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -4098,6 +4098,7 @@ bool ARMAsmParser::shouldOmitCCOutOperand(StringRef Mnemonic, // remove the cc_out operand. (!isARMLowRegister(static_cast<ARMOperand*>(Operands[3])->getReg()) || !isARMLowRegister(static_cast<ARMOperand*>(Operands[4])->getReg()) || + !isARMLowRegister(static_cast<ARMOperand*>(Operands[5])->getReg()) || !inITBlock() || (static_cast<ARMOperand*>(Operands[3])->getReg() != static_cast<ARMOperand*>(Operands[5])->getReg() && diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s index 74b0681a983..6c291db5c55 100644 --- a/llvm/test/MC/ARM/basic-thumb2-instructions.s +++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s @@ -1228,12 +1228,16 @@ _func: mul r3, r4, r6 it eq muleq r3, r4, r5 + it le + mulle r4, r4, r8 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43] @ CHECK: mul r3, r4, r3 @ encoding: [0x04,0xfb,0x03,0xf3] @ CHECK: mul r3, r4, r6 @ encoding: [0x04,0xfb,0x06,0xf3] @ CHECK: it eq @ encoding: [0x08,0xbf] @ CHECK: muleq r3, r4, r5 @ encoding: [0x04,0xfb,0x05,0xf3] +@ CHECK: it le @ encoding: [0xd8,0xbf] +@ CHECK: mulle r4, r4, r8 @ encoding: [0x04,0xfb,0x08,0xf4] @------------------------------------------------------------------------------ |
