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| author | Zachary Turner <zturner@google.com> | 2019-04-05 18:06:42 +0000 |
|---|---|---|
| committer | Zachary Turner <zturner@google.com> | 2019-04-05 18:06:42 +0000 |
| commit | 6eb7ab97a58d30f17068ac1b4e7c0da49b3817aa (patch) | |
| tree | a1f73c054bc282b494f362fbbd20cee9292222a3 | |
| parent | 50e609611c9c70c689fb26f2fcee32dd0399dd61 (diff) | |
| download | bcm5719-llvm-6eb7ab97a58d30f17068ac1b4e7c0da49b3817aa.tar.gz bcm5719-llvm-6eb7ab97a58d30f17068ac1b4e7c0da49b3817aa.zip | |
Try to fix Sphinx bot.
llvm-svn: 357790
| -rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index 33a486ee8fc..38a8cbf2b7d 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -433,14 +433,12 @@ The AMDGPU backend supports the following LLVM IR attributes. "amdgpu-waves-per-eu"="m,n" Specify the minimum and maximum number of waves per execution unit. Generated by the ``amdgpu_waves_per_eu`` CLANG attribute [CLANG-ATTR]_. - - "amdgpu-ieee" true/false. Specify whether the function expects - the IEEE field of the mode register to be set on entry. Overrides - the default for the calling convention. - "amdgpu-dx10-clamp" true/false. Specify whether the function expects - the DX10_CLAMP field of the mode register to be set on entry. Overrides - the default for the calling convention. - + "amdgpu-ieee" true/false. Specify whether the function expects the IEEE field of the + mode register to be set on entry. Overrides the default for + the calling convention. + "amdgpu-dx10-clamp" true/false. Specify whether the function expects the DX10_CLAMP field of + the mode register to be set on entry. Overrides the default + for the calling convention. ======================================= ========================================================== Code Object |
