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authorBill Wendling <isanbard@gmail.com>2011-04-13 23:36:21 +0000
committerBill Wendling <isanbard@gmail.com>2011-04-13 23:36:21 +0000
commit6dd69d924189be83b21c17aacba67f98a93933c5 (patch)
tree6204448e3568728cedfb3760723a3e4227218eb1
parent9c12834eed69539da9ad0333ba5d0b2a00de5070 (diff)
downloadbcm5719-llvm-6dd69d924189be83b21c17aacba67f98a93933c5.tar.gz
bcm5719-llvm-6dd69d924189be83b21c17aacba67f98a93933c5.zip
Add an option to not print the alias of an instruction. It defaults to "print
the alias". llvm-svn: 129485
-rw-r--r--llvm/include/llvm/Target/Target.td3
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td6
-rw-r--r--llvm/utils/TableGen/AsmWriterEmitter.cpp2
3 files changed, 8 insertions, 3 deletions
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index d01581555fe..8d6db9d7917 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -591,9 +591,10 @@ class MnemonicAlias<string From, string To> {
/// InstAlias - This defines an alternate assembly syntax that is allowed to
/// match an instruction that has a different (more canonical) assembly
/// representation.
-class InstAlias<string Asm, dag Result> {
+class InstAlias<string Asm, dag Result, bit Emit = 0b1> {
string AsmString = Asm; // The .s format to match the instruction with.
dag ResultInst = Result; // The MCInst to generate.
+ bit EmitAlias = Emit; // Emit the alias instead of what's aliased.
// Predicates - Predicates that must be true for this to match.
list<Predicate> Predicates = [];
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index f832a7c85a8..251b2fa1704 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -1534,8 +1534,10 @@ def : InstAlias<"mov $seg, $mem", (MOV32ms i32mem:$mem, SEGMENT_REG:$seg)>;
def : InstAlias<"movq $imm, $reg", (MOV64ri GR64:$reg, i64imm:$imm)>;
// Match 'movq GR64, MMX' as an alias for movd.
-def : InstAlias<"movq $src, $dst", (MMX_MOVD64to64rr VR64:$dst, GR64:$src)>;
-def : InstAlias<"movq $src, $dst", (MMX_MOVD64from64rr GR64:$dst, VR64:$src)>;
+def : InstAlias<"movq $src, $dst",
+ (MMX_MOVD64to64rr VR64:$dst, GR64:$src), 0b0>;
+def : InstAlias<"movq $src, $dst",
+ (MMX_MOVD64from64rr GR64:$dst, VR64:$src), 0b0>;
// movsd with no operands (as opposed to the SSE scalar move of a double) is an
// alias for movsl. (as in rep; movsd)
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 05bc113c374..f9686fd9b5a 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -840,6 +840,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Target);
const Record *R = *I;
+ if (!R->getValueAsBit("EmitAlias"))
+ continue; // We were told not to emit the alias, but to emit the aliasee.
const DagInit *DI = R->getValueAsDag("ResultInst");
const DefInit *Op = dynamic_cast<const DefInit*>(DI->getOperator());
AliasMap[getQualifiedName(Op->getDef())].push_back(Alias);
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