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| author | Silviu Baranga <silviu.baranga@arm.com> | 2015-09-01 11:12:35 +0000 |
|---|---|---|
| committer | Silviu Baranga <silviu.baranga@arm.com> | 2015-09-01 11:12:35 +0000 |
| commit | 6d3f05c04bf894cb0e230dab80148a80025abb11 (patch) | |
| tree | 7d3d71a6ca656f4952b117dc9aed78e50620d75a | |
| parent | 86852d3676b8d3f12bbac36f107d44a5b73afcc8 (diff) | |
| download | bcm5719-llvm-6d3f05c04bf894cb0e230dab80148a80025abb11.tar.gz bcm5719-llvm-6d3f05c04bf894cb0e230dab80148a80025abb11.zip | |
[ARM][AArch64] Turn on by default interleaved access lowering
Summary:
Interleaved access lowering removes a memory operation and a
sequence of vector shuffles and replaces it with a series of
memory operations. This should be always beneficial.
This pass in only enabled on ARM/AArch64.
Reviewers: rengolin
Subscribers: aemerson, llvm-commits, rengolin
Differential Revision: http://reviews.llvm.org/D12145
llvm-svn: 246540
| -rw-r--r-- | llvm/lib/CodeGen/InterleavedAccessPass.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/vext.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/vpadd.ll | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/InterleavedAccessPass.cpp b/llvm/lib/CodeGen/InterleavedAccessPass.cpp index baacf1ad9e1..724f1d61abe 100644 --- a/llvm/lib/CodeGen/InterleavedAccessPass.cpp +++ b/llvm/lib/CodeGen/InterleavedAccessPass.cpp @@ -52,7 +52,7 @@ using namespace llvm; static cl::opt<bool> LowerInterleavedAccesses( "lower-interleaved-accesses", cl::desc("Enable lowering interleaved accesses to intrinsics"), - cl::init(false), cl::Hidden); + cl::init(true), cl::Hidden); static unsigned MaxFactor; // The maximum supported interleave factor. diff --git a/llvm/test/CodeGen/ARM/vext.ll b/llvm/test/CodeGen/ARM/vext.ll index 61342022ad5..394ecfb281f 100644 --- a/llvm/test/CodeGen/ARM/vext.ll +++ b/llvm/test/CodeGen/ARM/vext.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s +; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - -lower-interleaved-accesses=false | FileCheck %s define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK-LABEL: test_vextd: diff --git a/llvm/test/CodeGen/ARM/vpadd.ll b/llvm/test/CodeGen/ARM/vpadd.ll index e362ce36f8b..6ddf9850cfc 100644 --- a/llvm/test/CodeGen/ARM/vpadd.ll +++ b/llvm/test/CodeGen/ARM/vpadd.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s +; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - -lower-interleaved-accesses=false | FileCheck %s define <8 x i8> @vpaddi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK-LABEL: vpaddi8: |
