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authorClement Courbet <courbet@google.com>2018-03-19 13:37:04 +0000
committerClement Courbet <courbet@google.com>2018-03-19 13:37:04 +0000
commit6d047b70a42146287d3e6e66820010abffd4439f (patch)
tree3ea18f4997366d950c990a6d5a298f7af7a060ec
parentd16037d9bbe27639add9fb48b993b2048d2d1031 (diff)
downloadbcm5719-llvm-6d047b70a42146287d3e6e66820010abffd4439f.tar.gz
bcm5719-llvm-6d047b70a42146287d3e6e66820010abffd4439f.zip
[MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by default."
Now that PR36557 is fixed. llvm-svn: 327840
-rw-r--r--llvm/lib/CodeGen/TargetPassConfig.cpp9
-rw-r--r--llvm/test/CodeGen/Generic/llc-start-stop.ll6
-rw-r--r--llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll22
-rw-r--r--llvm/test/CodeGen/X86/memcmp-mergeexpand.ll29
4 files changed, 20 insertions, 46 deletions
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index b28f56de47a..98e4fa9c0d0 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -94,10 +94,9 @@ static cl::opt<bool> EnableImplicitNullChecks(
"enable-implicit-null-checks",
cl::desc("Fold null checks into faulting memory operations"),
cl::init(false), cl::Hidden);
-static cl::opt<bool>
- EnableMergeICmps("enable-mergeicmps",
- cl::desc("Merge ICmp chains into a single memcmp"),
- cl::init(false), cl::Hidden);
+static cl::opt<bool> DisableMergeICmps("disable-mergeicmps",
+ cl::desc("Disable MergeICmps Pass"),
+ cl::init(false), cl::Hidden);
static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
cl::desc("Print LLVM IR produced by the loop-reduce pass"));
static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
@@ -596,7 +595,7 @@ void TargetPassConfig::addIRPasses() {
// loads and compares. ExpandMemCmpPass then tries to expand those calls
// into optimally-sized loads and compares. The transforms are enabled by a
// target lowering hook.
- if (EnableMergeICmps)
+ if (!DisableMergeICmps)
addPass(createMergeICmpsPass());
addPass(createExpandMemCmpPass());
}
diff --git a/llvm/test/CodeGen/Generic/llc-start-stop.ll b/llvm/test/CodeGen/Generic/llc-start-stop.ll
index 9056e2cab49..9f5e75a86dc 100644
--- a/llvm/test/CodeGen/Generic/llc-start-stop.ll
+++ b/llvm/test/CodeGen/Generic/llc-start-stop.ll
@@ -13,15 +13,15 @@
; STOP-BEFORE-NOT: Loop Strength Reduction
; RUN: llc < %s -debug-pass=Structure -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-AFTER
-; START-AFTER: -machine-branch-prob -expandmemcmp
+; START-AFTER: -machine-branch-prob -mergeicmps
; START-AFTER: FunctionPass Manager
-; START-AFTER-NEXT: Expand memcmp() to load/stores
+; START-AFTER-NEXT: Merge contiguous icmps into a memcmp
; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE
; START-BEFORE: -machine-branch-prob -domtree
; START-BEFORE: FunctionPass Manager
; START-BEFORE: Loop Strength Reduction
-; START-BEFORE-NEXT: Expand memcmp() to load/stores
+; START-BEFORE-NEXT: Merge contiguous icmps into a memcmp
; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE
; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE
diff --git a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll b/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
index c87abbfa7be..83b1cd505db 100644
--- a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
+++ b/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
@@ -7,22 +7,12 @@
define zeroext i1 @opeq1(
; PPC64LE-LABEL: opeq1:
-; PPC64LE: # %bb.0: # %entry
-; PPC64LE-NEXT: lwz 5, 0(3)
-; PPC64LE-NEXT: lwz 6, 0(4)
-; PPC64LE-NEXT: cmplw 5, 6
-; PPC64LE-NEXT: bne 0, .LBB0_2
-; PPC64LE-NEXT: # %bb.1: # %land.rhs.i
-; PPC64LE-NEXT: lwz 3, 4(3)
-; PPC64LE-NEXT: lwz 4, 4(4)
-; PPC64LE-NEXT: cmpw 3, 4
-; PPC64LE-NEXT: b .LBB0_3
-; PPC64LE-NEXT: .LBB0_2:
-; PPC64LE-NEXT: crxor 2, 2, 2
-; PPC64LE-NEXT: .LBB0_3: # %opeq1.exit
-; PPC64LE-NEXT: li 3, 0
-; PPC64LE-NEXT: li 4, 1
-; PPC64LE-NEXT: isel 3, 4, 3, 2
+; PPC64LE: # %bb.0: # %opeq1.exit
+; PPC64LE-NEXT: ld 3, 0(3)
+; PPC64LE-NEXT: ld 4, 0(4)
+; PPC64LE-NEXT: xor 3, 3, 4
+; PPC64LE-NEXT: cntlzd 3, 3
+; PPC64LE-NEXT: rldicl 3, 3, 58, 63
; PPC64LE-NEXT: blr
%"struct.std::pair"* nocapture readonly dereferenceable(8) %a,
%"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
index 1b928d6f967..1c470177c27 100644
--- a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
+++ b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
@@ -8,37 +8,22 @@
define zeroext i1 @opeq1(
; X86-LABEL: opeq1:
-; X86: # %bb.0: # %entry
+; X86: # %bb.0: # %opeq1.exit
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %edx
-; X86-NEXT: cmpl (%eax), %edx
-; X86-NEXT: jne .LBB0_1
-; X86-NEXT: # %bb.2: # %land.rhs.i
; X86-NEXT: movl 4(%ecx), %ecx
-; X86-NEXT: cmpl 4(%eax), %ecx
+; X86-NEXT: xorl (%eax), %edx
+; X86-NEXT: xorl 4(%eax), %ecx
+; X86-NEXT: orl %edx, %ecx
; X86-NEXT: sete %al
-; X86-NEXT: # kill: def $al killed $al killed $eax
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_1:
-; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl
;
; X64-LABEL: opeq1:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: cmpl (%rsi), %eax
-; X64-NEXT: jne .LBB0_1
-; X64-NEXT: # %bb.2: # %land.rhs.i
-; X64-NEXT: movl 4(%rdi), %eax
-; X64-NEXT: cmpl 4(%rsi), %eax
+; X64: # %bb.0: # %opeq1.exit
+; X64-NEXT: movq (%rdi), %rax
+; X64-NEXT: cmpq (%rsi), %rax
; X64-NEXT: sete %al
-; X64-NEXT: # kill: def $al killed $al killed $eax
-; X64-NEXT: retq
-; X64-NEXT: .LBB0_1:
-; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%"struct.std::pair"* nocapture readonly dereferenceable(8) %a,
%"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {
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