summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2009-09-13 19:44:38 +0000
committerChris Lattner <sabre@nondot.org>2009-09-13 19:44:38 +0000
commit6ceb0faafdb341af0a8eff7992bd04933422d4b7 (patch)
tree6b6446768d810d1af074764da83cc1912f729f4c
parent1cbd3ded338528ed95cf802da6c38ab903a01eca (diff)
downloadbcm5719-llvm-6ceb0faafdb341af0a8eff7992bd04933422d4b7.tar.gz
bcm5719-llvm-6ceb0faafdb341af0a8eff7992bd04933422d4b7.zip
make intel asmprinter use TRI::getAsmName instead of TRI::getName like
all the other targets. Add support for weak/linkonce linkage so it doesn't crash on basically all nontrivial testcases. llvm-svn: 81704
-rw-r--r--llvm/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp4
-rw-r--r--llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp32
2 files changed, 21 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
index c37b656e47b..d989f60a595 100644
--- a/llvm/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
+++ b/llvm/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
@@ -70,9 +70,7 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
- O << '%';
- unsigned Reg = Op.getReg();
- O << TRI->getAsmName(Reg);
+ O << '%' << TRI->getAsmName(Op.getReg());
return;
} else if (Op.isImm()) {
O << '$' << Op.getImm();
diff --git a/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp b/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
index a3e5286d8ee..484b5e91cdb 100644
--- a/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
@@ -149,6 +149,11 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
switch (F->getLinkage()) {
default: llvm_unreachable("Unsupported linkage type!");
+ case Function::LinkOnceAnyLinkage:
+ case Function::LinkOnceODRLinkage:
+ case Function::WeakAnyLinkage:
+ case Function::WeakODRLinkage:
+
case Function::PrivateLinkage:
case Function::LinkerPrivateLinkage:
case Function::InternalLinkage:
@@ -204,21 +209,24 @@ void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
}
}
+static void PrintRegName(raw_ostream &O, StringRef RegName) {
+ for (unsigned i = 0, e = RegName.size(); i != e; ++i)
+ O << (char)toupper(RegName[i]);
+}
+
void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
const char *Modifier) {
switch (MO.getType()) {
case MachineOperand::MO_Register: {
- if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
- unsigned Reg = MO.getReg();
- if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
- EVT VT = (strcmp(Modifier,"subreg64") == 0) ?
- MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
- ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
- Reg = getX86SubSuperRegister(Reg, VT);
- }
- O << TRI->getName(Reg);
- } else
- O << "reg" << MO.getReg();
+ assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()));
+ unsigned Reg = MO.getReg();
+ if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
+ EVT VT = (strcmp(Modifier,"subreg64") == 0) ?
+ MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
+ ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
+ Reg = getX86SubSuperRegister(Reg, VT);
+ }
+ PrintRegName(O, TRI->getAsmName(Reg));
return;
}
case MachineOperand::MO_Immediate:
@@ -391,7 +399,7 @@ bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
break;
}
- O << TRI->getName(Reg);
+ PrintRegName(O, TRI->getAsmName(Reg));
return false;
}
OpenPOWER on IntegriCloud