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| author | Dale Johannesen <dalej@apple.com> | 2008-02-14 23:35:16 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-02-14 23:35:16 +0000 |
| commit | 6ca3ccf519290ba7ec0776fad89c7dab5a8c4f78 (patch) | |
| tree | 89cfd40d57385bbf82bd6fad9d7acf4d0e4560df | |
| parent | 8e6f6e05c38e3cb0fe7d41d9f94cc40e85635c09 (diff) | |
| download | bcm5719-llvm-6ca3ccf519290ba7ec0776fad89c7dab5a8c4f78.tar.gz bcm5719-llvm-6ca3ccf519290ba7ec0776fad89c7dab5a8c4f78.zip | |
Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to. Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.
llvm-svn: 47143
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUSubtarget.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.h | 1 | ||||
| -rw-r--r-- | llvm/utils/TableGen/SubtargetEmitter.cpp | 8 |
5 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUSubtarget.h b/llvm/lib/Target/CellSPU/SPUSubtarget.h index 2ee7bb8520b..51dd44c5f9d 100644 --- a/llvm/lib/Target/CellSPU/SPUSubtarget.h +++ b/llvm/lib/Target/CellSPU/SPUSubtarget.h @@ -26,6 +26,7 @@ namespace llvm { namespace SPU { enum { + PROC_NONE, DEFAULT_PROC }; } diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 71ce14708cc..605dc128db4 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -849,6 +849,7 @@ bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) { bool DarwinAsmPrinter::doInitialization(Module &M) { static const char *CPUDirectives[] = { + "", "ppc", "ppc601", "ppc602", diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp index dff53baa16b..030dc7a17ca 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp @@ -60,6 +60,7 @@ PPCSubtarget::PPCSubtarget(const TargetMachine &tm, const Module &M, const std::string &FS, bool is64Bit) : TM(tm) , StackAlignment(16) + , DarwinDirective(PPC::DIR_NONE) , IsGigaProcessor(false) , Has64BitSupport(false) , Use64BitRegs(false) diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h index c55e09720b3..be4c21cd448 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.h +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h @@ -27,6 +27,7 @@ namespace llvm { namespace PPC { // -m directive values. enum { + DIR_NONE, DIR_32, DIR_601, DIR_602, diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index 1f34bcc2177..5e7688a6196 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -482,8 +482,12 @@ void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) { const std::string &Value = R->getValueAsString("Value"); const std::string &Attribute = R->getValueAsString("Attribute"); - OS << " if ((Bits & " << Instance << ") != 0) " - << Attribute << " = " << Value << ";\n"; + if (Value=="true" || Value=="false") + OS << " if ((Bits & " << Instance << ") != 0) " + << Attribute << " = " << Value << ";\n"; + else + OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute << + " < " << Value << ") " << Attribute << " = " << Value << ";\n"; } if (HasItineraries) { |

