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| author | Eric Christopher <echristo@apple.com> | 2010-06-15 23:08:42 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2010-06-15 23:08:42 +0000 |
| commit | 6c4d63e1a5b06708a0e15eb1b4a62c956d20b387 (patch) | |
| tree | 5e8ce5395f524cf2849199d2f391765c1f01718e | |
| parent | 9b5005cd4b6474cf18d399359e694e55bd96cb10 (diff) | |
| download | bcm5719-llvm-6c4d63e1a5b06708a0e15eb1b4a62c956d20b387.tar.gz bcm5719-llvm-6c4d63e1a5b06708a0e15eb1b4a62c956d20b387.zip | |
For 32-bit non-pic tlv mach-o addressing we don't need a pic base or
a relative address.
llvm-svn: 106064
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 6d88454ba84..8e336f99e38 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -8543,6 +8543,15 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI, .addReg(0); MIB = BuildMI(BB, DL, TII->get(X86::CALL64m)); addDirectMem(MIB, X86::RDI).addReg(0); + } else if (getTargetMachine().getRelocationModel() != Reloc::PIC_) { + MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX) + .addReg(0) + .addImm(0).addReg(0) + .addGlobalAddress(MI->getOperand(3).getGlobal(), 0, + MI->getOperand(3).getTargetFlags()) + .addReg(0); + MIB = BuildMI(BB, DL, TII->get(X86::CALL32m)); + addDirectMem(MIB, X86::EAX).addReg(0); } else { MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX) .addReg(TII->getGlobalBaseReg(F)) |
