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| author | Alex Bradbury <asb@lowrisc.org> | 2017-02-14 05:17:23 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-02-14 05:17:23 +0000 |
| commit | 6be16fbfb8107dcc72e9fd2c15a6350013dfc162 (patch) | |
| tree | 7bb9c5fd21dbb0a63d664d8275c9e8522a2f92a7 | |
| parent | d36e04cb6c2f308d6789f841a7155334aca7d688 (diff) | |
| download | bcm5719-llvm-6be16fbfb8107dcc72e9fd2c15a6350013dfc162.tar.gz bcm5719-llvm-6be16fbfb8107dcc72e9fd2c15a6350013dfc162.zip | |
[RISCV] Pseudo instructions are isCodeGenOnly, have blank asmstr
llvm-svn: 295027
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrFormats.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormats.td b/llvm/lib/Target/RISCV/RISCVInstrFormats.td index 1e9bc3bf9bc..3fab7122f6f 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrFormats.td +++ b/llvm/lib/Target/RISCV/RISCVInstrFormats.td @@ -44,8 +44,9 @@ class RISCVInst<dag outs, dag ins, string asmstr, list<dag> pattern> // Pseudo instructions class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern> - : RISCVInst<outs, ins, asmstr, pattern> { + : RISCVInst<outs, ins, "", pattern> { let isPseudo = 1; + let isCodeGenOnly = 1; } class FR<bits<7> funct7, bits<3> funct3, bits<7> opcode, dag outs, dag ins, |
