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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2015-01-13 19:43:45 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2015-01-13 19:43:45 +0000
commit6b577e26f0c41331fea19ea3e7e5f34524f1b663 (patch)
tree970317dce70d7212d61d030083ac81bf81a89898
parentc642e954023b38265d2c3df4ec3d9ba169b69048 (diff)
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Use the integrated assembler as default on PowerPC
This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases using inline asm had to be adapted, either by updating the expected output, or by using -no-integrated-as (for such tests that deliberately use an invalid instruction in inline asm). llvm-svn: 225819
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp3
-rw-r--r--llvm/test/CodeGen/PowerPC/asm-constraints.ll9
-rw-r--r--llvm/test/CodeGen/PowerPC/crsave.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/ia-neg-const.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll2
7 files changed, 13 insertions, 13 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index 1be7b482b6a..2b4f2d81db8 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -74,7 +74,6 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
AssemblerDialect = 1; // New-Style mnemonics.
LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
- if (T.isOSFreeBSD() || ((T.isOSNetBSD() || T.isOSOpenBSD()) && !is64Bit))
- UseIntegratedAssembler = true;
+ UseIntegratedAssembler = true;
}
diff --git a/llvm/test/CodeGen/PowerPC/asm-constraints.ll b/llvm/test/CodeGen/PowerPC/asm-constraints.ll
index f354a8aa611..9bf8b75e0ac 100644
--- a/llvm/test/CodeGen/PowerPC/asm-constraints.ll
+++ b/llvm/test/CodeGen/PowerPC/asm-constraints.ll
@@ -30,10 +30,11 @@ entry:
}
; CHECK-LABEL: @foo
-; CHECK: ld [[REG:[0-9]+]],0(4)
-; CHECK-NEXT: cmpw [[REG]],[[REG]]
-; CHECK-NEXT: bne- 1f
-; CHECK-NEXT: 1: isync
+; CHECK: ld [[REG:[0-9]+]], 0(4)
+; CHECK: cmpw 0, [[REG]], [[REG]]
+; CHECK: bne- 0, .Ltmp[[TMP:[0-9]+]]
+; CHECK: .Ltmp[[TMP]]:
+; CHECK: isync
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind }
diff --git a/llvm/test/CodeGen/PowerPC/crsave.ll b/llvm/test/CodeGen/PowerPC/crsave.ll
index a9b4b360783..602ba94dc09 100644
--- a/llvm/test/CodeGen/PowerPC/crsave.ll
+++ b/llvm/test/CodeGen/PowerPC/crsave.ll
@@ -6,7 +6,7 @@ declare void @foo()
define i32 @test_cr2() nounwind uwtable {
entry:
%ret = alloca i32, align 4
- %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
+ %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
store i32 %0, i32* %ret, align 4
call void @foo()
%1 = load i32* %ret, align 4
@@ -35,7 +35,7 @@ entry:
define i32 @test_cr234() nounwind {
entry:
%ret = alloca i32, align 4
- %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09cmp 3,$2,$2\0A\09cmp 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
+ %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
store i32 %0, i32* %ret, align 4
call void @foo()
%1 = load i32* %ret, align 4
diff --git a/llvm/test/CodeGen/PowerPC/ia-neg-const.ll b/llvm/test/CodeGen/PowerPC/ia-neg-const.ll
index 165fc1339d0..556ab80e2c0 100644
--- a/llvm/test/CodeGen/PowerPC/ia-neg-const.ll
+++ b/llvm/test/CodeGen/PowerPC/ia-neg-const.ll
@@ -14,8 +14,8 @@ entry:
}
; CHECK: ld
-; CHECK-NOT: addi 3,3,4294967295
-; CHECK: addi 3,3,-1
+; CHECK-NOT: addi 3, 3, 4294967295
+; CHECK: addi 3, 3, -1
; CHECK: blr
; Function Attrs: nounwind
diff --git a/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll b/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll
index 1321dfce202..08b1a2c876e 100644
--- a/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll
+++ b/llvm/test/CodeGen/PowerPC/in-asm-f64-reg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -no-integrated-as | FileCheck %s
define void @f() {
; CHECK: @f
diff --git a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll
index 659cdf74d02..743cc62ddba 100644
--- a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll
+++ b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc32 -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"
target triple = "powerpc"
diff --git a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll
index 3da06f65db8..29a57867f56 100644
--- a/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll
+++ b/llvm/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=ppc64
+; RUN: llc < %s -march=ppc64 -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64"
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