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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-07-19 11:03:08 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-07-19 11:03:08 +0000 |
| commit | 69e40a4c85474942f44f762f244b702da2bfe8c3 (patch) | |
| tree | c4281a6c30cea1126c15ab224044eb1015df9895 | |
| parent | ba51d116c42a5a02bc8128d13c38657160862a15 (diff) | |
| download | bcm5719-llvm-69e40a4c85474942f44f762f244b702da2bfe8c3.tar.gz bcm5719-llvm-69e40a4c85474942f44f762f244b702da2bfe8c3.zip | |
[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D11257
Patch by: marina.yatsina@intel.com
llvm-svn: 242639
| -rw-r--r-- | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax.s | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 418f0431e1d..e9adfd27935 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1028,6 +1028,7 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) { .Cases("DWORD", "dword", 32) .Cases("QWORD", "qword", 64) .Cases("XWORD", "xword", 80) + .Cases("TBYTE", "tbyte", 80) .Cases("XMMWORD", "xmmword", 128) .Cases("YMMWORD", "ymmword", 256) .Cases("ZMMWORD", "zmmword", 512) diff --git a/llvm/test/MC/X86/intel-syntax.s b/llvm/test/MC/X86/intel-syntax.s index 30fe6c8b9b1..04264083bf2 100644 --- a/llvm/test/MC/X86/intel-syntax.s +++ b/llvm/test/MC/X86/intel-syntax.s @@ -635,10 +635,12 @@ add byte ptr [rax], 1 // CHECK: addw $1, (%rax) // CHECK: addb $1, (%rax) +fstp tbyte ptr [rax] fstp xword ptr [rax] fstp qword ptr [rax] fstp dword ptr [rax] // CHECK: fstpt (%rax) +// CHECK: fstpt (%rax) // CHECK: fstpl (%rax) // CHECK: fstps (%rax) |
